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Message-ID: <Z8iewiPz4WZOdmbE@lx-t490>
Date: Wed, 5 Mar 2025 19:58:10 +0100
From: "Ahmed S. Darwish" <darwi@...utronix.de>
To: Andrew Cooper <andrew.cooper3@...rix.com>
Cc: Borislav Petkov <bp@...en8.de>, Ingo Molnar <mingo@...hat.com>,
Dave Hansen <dave.hansen@...ux.intel.com>,
Thomas Gleixner <tglx@...utronix.de>,
John Ogness <john.ogness@...utronix.de>,
"H. Peter Anvin" <hpa@...or.com>, x86@...nel.org,
x86-cpuid@...ts.linux.dev, LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v1 37/40] x86/cacheinfo: Extract out cache self-snoop
checks
On Wed, 05 Mar 2025, Andrew Cooper wrote:
...
> It turns out not to be safe in cases where the underlying physical
> memory changes from cacheable to unchangeable. By skipping the WBINVD
> as part of changing the memory type, you end up with spurious writebacks
> at a later point when the memory is expected to be UC. Apparently this
> is a problem for CLX devices, hence the change in the SDM.
...
>
> CLX (Cascade Lake) != CXL (Compute eXpress Link).
>
> CXL is the new PCIe. (So say the CXL consortium at least.)
>
Oh, sorry, you wrote "CLX devices" above, not CXL... Only thing my poor
brain could come up with was CASCADELAKE_X :)
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