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Message-ID: <67c8a0cc23ec_24b64294f6@dwillia2-xfh.jf.intel.com.notmuch>
Date: Wed, 5 Mar 2025 11:06:52 -0800
From: Dan Williams <dan.j.williams@...el.com>
To: Robert Richter <rrichter@....com>, Alison Schofield
	<alison.schofield@...el.com>, Vishal Verma <vishal.l.verma@...el.com>, "Ira
 Weiny" <ira.weiny@...el.com>, Dan Williams <dan.j.williams@...el.com>,
	Jonathan Cameron <Jonathan.Cameron@...wei.com>, Dave Jiang
	<dave.jiang@...el.com>, Davidlohr Bueso <dave@...olabs.net>
CC: <linux-cxl@...r.kernel.org>, <linux-kernel@...r.kernel.org>, Gregory Price
	<gourry@...rry.net>, Terry Bowman <terry.bowman@....com>, Robert Richter
	<rrichter@....com>
Subject: Re: [PATCH 0/2] cxl/pci: Inactive downstream port handling

Robert Richter wrote:
> A small series with individual patches to handle inactive downstream
> ports during enumeration. First patch changes downstream port
> enumeration to ignore those with duplicate port IDs. Second patch only
> enables active downstream ports with the link status up.
> 
> Patches are independent each and can be applied individually.
> 
> Robert Richter (2):
>   cxl/pci: Ignore downstream ports with duplicate port IDs
>   cxl/pci: Check link status and only enable active dports

Both of these problems are to addressed by work in progress patches to
delay dport enumeration until a cxl_memdev is registered beneath that
leg of CXL topology.

I would prefer to focus on that solution and skip these band-aids in
the near term unless there is an urgent need that makes it clear that
waiting for v6.16 is not tenable.

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