linux-kernel - Re: [PATCH 6/8] clk: rockchip: rk3528: Add SD/SDIO tuning clocks in GRF region

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Message-ID: <Z8gsGlZ7GgNF-zoc@pie.lan>
Date: Wed, 5 Mar 2025 10:49:21 +0000
From: Yao Zi <ziyao@...root.org>
To: Heiko Stübner <heiko@...ech.de>,
	Ulf Hansson <ulf.hansson@...aro.org>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Michael Turquette <mturquette@...libre.com>,
	Stephen Boyd <sboyd@...nel.org>,
	Frank Wang <frank.wang@...k-chips.com>,
	Shresth Prasad <shresthprasad7@...il.com>,
	Cristian Ciocaltea <cristian.ciocaltea@...labora.com>,
	Detlev Casanova <detlev.casanova@...labora.com>,
	Jonas Karlman <jonas@...boo.se>
Cc: linux-mmc@...r.kernel.org, devicetree@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
	linux-clk@...r.kernel.org
Subject: Re: [PATCH 6/8] clk: rockchip: rk3528: Add SD/SDIO tuning clocks in
 GRF region

On Wed, Mar 05, 2025 at 11:21:48AM +0100, Heiko Stübner wrote:
> Hi,
> 
> Am Samstag, 1. März 2025, 11:47:24 MEZ schrieb Yao Zi:
> > These clocks locate in VO and VPU GRF, serving for SD/SDIO controller
> > tuning purpose. Add their definitions and register them in driver if
> > corresponding GRF is available.
> 
> (no critique, just an observation :-) )
> 
> this puts a completely new meaning on the "general register files"
> as dumping ground ;-) .
> 
> Whoever got the idea of making sdmm/sdio tuning controls part
> of GRFs that are supposed display and/or video encoder parts :-D

Yes, the register layout is quite weird. Additionally some USB2 phy
registers locate in VO GRF as well...

> 
> > GRFs are looked up by compatible to simplify devicetree binding.
> > 
> > Signed-off-by: Yao Zi <ziyao@...root.org>
> > ---
> 
> >  static int __init clk_rk3528_probe(struct platform_device *pdev)
> >  {
> > +	unsigned long nr_vpu_branches = ARRAY_SIZE(rk3528_vpu_clk_branches);
> > +	unsigned long nr_vo_branches = ARRAY_SIZE(rk3528_vo_clk_branches);
> > +	unsigned long nr_branches = ARRAY_SIZE(rk3528_clk_branches);
> >  	struct rockchip_clk_provider *ctx;
> >  	struct device *dev = &pdev->dev;
> >  	struct device_node *np = dev->of_node;
> > -	unsigned long nr_branches = ARRAY_SIZE(rk3528_clk_branches);
> > -	unsigned long nr_clks;
> > +	struct regmap *vo_grf, *vpu_grf;
> >  	void __iomem *reg_base;
> > -
> > -	nr_clks = rockchip_clk_find_max_clk_id(rk3528_clk_branches,
> > -					       nr_branches) + 1;
> > +	unsigned long nr_clks;
> >  
> >  	reg_base = devm_platform_ioremap_resource(pdev, 0);
> >  	if (IS_ERR(reg_base))
> >  		return dev_err_probe(dev, PTR_ERR(reg_base),
> >  				     "could not map cru region");
> >  
> > +	nr_clks = rockchip_clk_find_max_clk_id(rk3528_clk_branches,
> > +					       nr_branches) + 1;
> > +
> > +	vo_grf = syscon_regmap_lookup_by_compatible("rockchip,rk3528-vo-grf");
> > +	if (!IS_ERR(vo_grf))
> 
> for readability, please make this into something like
> 	if (!IS_ERR(vo_grf)) {
> 		nr_vo_clks = rockchip_clk_find_max_clk_id(rk3528_vo_clk_branches,
> 							   nr_vo_branches) + 1;
> 		nr_clks = max(nr_vo_clks, nr_clks);
> 	}

Thanks for the suggestion, will take it.

> > +	else if (PTR_ERR(vo_grf) != ENODEV)
> > +		return dev_err_probe(dev, PTR_ERR(vo_grf),
> > +				     "failed to look up VO GRF\n");
> > +
> > +	vpu_grf = syscon_regmap_lookup_by_compatible("rockchip,rk3528-vpu-grf");
> > +	if (!IS_ERR(vpu_grf))
> > +		nr_clks = MAX(rockchip_clk_find_max_clk_id(rk3528_vpu_clk_branches,
> > +							   nr_vpu_branches) + 1,
> > +			      nr_clks);
> 
> same here please
> 
> > +	else if (PTR_ERR(vpu_grf) != ENODEV)
> > +		return dev_err_probe(dev, PTR_ERR(vpu_grf),
> > +				     "failed to look up VPU GRF\n");
> > +
> >  	ctx = rockchip_clk_init(np, reg_base, nr_clks);
> >  	if (IS_ERR(ctx))
> >  		return dev_err_probe(dev, PTR_ERR(ctx),
> 
> Thanks
> Heiko
> 

Cheers,
Yao Zi