linux-kernel - Re: [PATCH v6 04/15] x86/pvh: Use fixed_percpu

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Message-ID: <CAGudoHG3pogGkTG5M+jMevn16hYLsy5zdbM0y5gBP0XMOK1vNw@mail.gmail.com>
Date: Wed, 5 Mar 2025 13:01:30 +0100
From: Mateusz Guzik <mjguzik@...il.com>
To: Uros Bizjak <ubizjak@...il.com>
Cc: "H. Peter Anvin" <hpa@...or.com>, Brian Gerst <brgerst@...il.com>, linux-kernel@...r.kernel.org, 
	x86@...nel.org, Ingo Molnar <mingo@...nel.org>, Thomas Gleixner <tglx@...utronix.de>, 
	Borislav Petkov <bp@...en8.de>, Ard Biesheuvel <ardb@...nel.org>
Subject: Re: [PATCH v6 04/15] x86/pvh: Use fixed_percpu_data for early boot GSBASE

On Wed, Mar 5, 2025 at 8:16 AM Uros Bizjak <ubizjak@...il.com> wrote:
>
> On Wed, Mar 5, 2025 at 12:49 AM Mateusz Guzik <mjguzik@...il.com> wrote:
> >
> > On Wed, Mar 5, 2025 at 12:45 AM H. Peter Anvin <hpa@...or.com> wrote:
> > >
> > > On March 4, 2025 2:26:20 PM PST, Mateusz Guzik <mjguzik@...il.com> wrote:
> > > >On Thu, Jan 23, 2025 at 02:07:36PM -0500, Brian Gerst wrote:
> > > >> Instead of having a private area for the stack canary, use
> > > >> fixed_percpu_data for GSBASE like the native kernel.
> > > >>
> > > >> Signed-off-by: Brian Gerst <brgerst@...il.com>
> > > >> Reviewed-by: Ard Biesheuvel <ardb@...nel.org>
> > > >> ---
> > > >>  arch/x86/platform/pvh/head.S | 15 +++++++++------
> > > >>  1 file changed, 9 insertions(+), 6 deletions(-)
> > > >>
> > > >> diff --git a/arch/x86/platform/pvh/head.S b/arch/x86/platform/pvh/head.S
> > > >> index 4733a5f467b8..fa0072e0ca43 100644
> > > >> --- a/arch/x86/platform/pvh/head.S
> > > >> +++ b/arch/x86/platform/pvh/head.S
> > > >> @@ -173,10 +173,15 @@ SYM_CODE_START(pvh_start_xen)
> > > >>  1:
> > > >>      UNWIND_HINT_END_OF_STACK
> > > >>
> > > >> -    /* Set base address in stack canary descriptor. */
> > > >> -    mov $MSR_GS_BASE,%ecx
> > > >> -    leal canary(%rip), %eax
> > > >> -    xor %edx, %edx
> > > >> +    /*
> > > >> +     * Set up GSBASE.
> > > >> +     * Note that, on SMP, the boot cpu uses init data section until
> > > >> +     * the per cpu areas are set up.
> > > >> +     */
> > > >> +    movl $MSR_GS_BASE,%ecx
> > > >> +    leaq INIT_PER_CPU_VAR(fixed_percpu_data)(%rip), %rdx
> > > >> +    movq %edx, %eax
> > > >
> > > >       movl
> > > >
> > > >I'm bisecting perf breakage and landing on this commit breaks the build.
> > >
> > > Breaks the build how?
> >
> >   AS      arch/x86/platform/pvh/head.o
> > arch/x86/platform/pvh/head.S: Assembler messages:
> > arch/x86/platform/pvh/head.S:183: Error: incorrect register `%eax'
> > used with `q' suffix
> >
> > Per the above, I presume it was meant to be a movl.
>
> Please note that this part is further changed in [PATCH 8/15] [1], so
> the breakage is temporary.
>
> [1] https://lore.kernel.org/lkml/20250123190747.745588-9-brgerst@gmail.com/
>

Top of the tree does build, so I assumed this did get addressed in
later patches.

I am saying I ran into this build breakage while bisecting. Other
people may be in the same spot.

It should pose no difficulty to s/movq/movl/ in the branch and be done with it.

-- 
Mateusz Guzik <mjguzik gmail.com>