lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <7020561.MhkbZ0Pkbq@diego>
Date: Thu, 06 Mar 2025 14:51:16 +0100
From: Heiko Stübner <heiko@...ech.de>
To: Chukun Pan <amadeus@....edu.cn>
Cc: amadeus@....edu.cn, conor+dt@...nel.org, devicetree@...r.kernel.org,
 krzk+dt@...nel.org, linux-arm-kernel@...ts.infradead.org,
 linux-kernel@...r.kernel.org, linux-rockchip@...ts.infradead.org,
 robh@...nel.org, ziyao@...root.org
Subject: Re: [PATCH 1/1] arm64: dts: rockchip: enable SCMI clk for RK3528 SoC

Am Donnerstag, 6. März 2025, 14:40:02 MEZ schrieb Chukun Pan:
> Hi,
> 
> > That sram is part of the soc (and has an mmio-address), so I'd think
> > it should live inside the soc node?
> 
> But soc ranges starts from 0xfe000000, I don't know whether to change it.
> And all other nodes are 0xf..., except this sram.
> Any suggestions would be greatly appreciated.

darn ... I didn't realize that this is not sram, but main memory :-)

in freescale/s32g3.dtsi and blaize/blaize-blzp1600.dtsi I see structures like:

        reserved-memory  {
                #address-cells = <2>;
                #size-cells = <2>;
                ranges;
                
                scmi_shmem: shm@...00000 {
                        compatible = "arm,scmi-shmem";
                        reg = <0x0 0xd0000000 0x0 0x80>;
                        no-map;
                };
        };

does something like this work on the rk3528?

Heiko



Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ