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Message-ID: <7fad9ddf-f113-4c07-965a-5c515f1def7b@intel.com>
Date: Thu, 6 Mar 2025 16:27:53 +0200
From: Adrian Hunter <adrian.hunter@...el.com>
To: Ben Chuang <benchuanggli@...il.com>
CC: Victor Shih <victorshihgli@...il.com>, <ulf.hansson@...aro.org>,
<linux-mmc@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<Lucas.Lai@...esyslogic.com.tw>, <HL.Liu@...esyslogic.com.tw>,
<Greg.tu@...esyslogic.com.tw>, <dlunev@...omium.org>, Ben Chuang
<ben.chuang@...esyslogic.com.tw>, AKASHI Takahiro
<takahiro.akashi@...aro.org>, Victor Shih <victor.shih@...esyslogic.com.tw>,
<asahi@...ts.linux.dev>, Janne Grunau <j@...nau.net>
Subject: Re: [PATCH V23 15/16] mmc: sdhci-pci-gli: enable UHS-II mode for
GL9755
On 5/03/25 02:56, Ben Chuang wrote:
> Hi Janne,
>
> On Thu, Feb 20, 2025 at 5:32 AM Janne Grunau <j@...nau.net> wrote:
>>
>> Hej,
>>
>> On Fri, Oct 18, 2024 at 06:53:32PM +0800, Victor Shih wrote:
>>> From: Victor Shih <victor.shih@...esyslogic.com.tw>
>>>
>>> Changes are:
>>> * Disable GL9755 overcurrent interrupt when power on/off on UHS-II.
>>> * Enable the internal clock when do reset on UHS-II mode.
>>> * Increase timeout value before detecting UHS-II interface.
>>> * Add vendor settings fro UHS-II mode.
>>> * Remove sdhci_gli_enable_internal_clock functon unused clk_ctrl variable.
>>> * Make a function sdhci_gli_wait_software_reset_done() for gl9755 reset.
>>> * Remove unnecessary code from sdhci_gl9755_reset().
>>>
>>> Signed-off-by: Ben Chuang <ben.chuang@...esyslogic.com.tw>
>>> Signed-off-by: AKASHI Takahiro <takahiro.akashi@...aro.org>
>>> Signed-off-by: Victor Shih <victor.shih@...esyslogic.com.tw>
>>> Signed-off-by: Lucas Lai <lucas.lai@...esyslogic.com.tw>
>>> ---
>>>
>>> drivers/mmc/host/sdhci-pci-gli.c | 235 ++++++++++++++++++++++++++++++-
>>> 1 file changed, 234 insertions(+), 1 deletion(-)
>>
>> This change results in error messages / timeout about UHS2 followed by
>> register dumps with the GL9755 integrated in Apple silicon Macbook Pros
>> and Mac Studio systems. Non UHS-II function of controller does not seem
>> to be affected. Apple advertises the the SDXC slot as UHS-II capable.
>>
>> The only quirk we've experienced with gl9755 on this platform is that 8
>> and 16 bit MMIO reads do not work. Workaround added in commit
>> c064bb5c78c1b ("mmc: sdhci-pci-gli: GL975[50]: Issue 8/16-bit MMIO reads
>> as 32-bit reads.").
>>
>> If you have ideas or patches to try I'm happy to do that. If not we can
>> look into what MacOS does.
>>
>> See kernel log and lspci output below
>>
>> Thanks,
>> Janne
>>
>> [ 38.130033] kernel: sdhci: Secure Digital Host Controller Interface driver
>> [ 38.130141] kernel: sdhci: Copyright(c) Pierre Ossman
>> [ 38.133352] kernel: sdhci-pci 0000:02:00.0: Adding to iommu group 13
>> [ 38.160551] kernel: sdhci-pci 0000:02:00.0: SDHCI controller found [17a0:9755] (rev 1)
>> [ 38.160655] kernel: sdhci-pci 0000:02:00.0: enabling device (0000 -> 0002)
>> [ 38.160750] kernel: mmc0: SDHCI controller on PCI [0000:02:00.0] using ADMA 64-bit
>> [ 38.274617] kernel: mmc0: not detect UHS2 interface in 100ms.
>> [ 38.274717] kernel: mmc0: sdhci: ============ SDHCI REGISTER DUMP ===========
>> [ 38.274782] kernel: mmc0: sdhci: Sys addr: 0x00000000 | Version: 0x00000005
>> [ 38.277391] kernel: mmc0: sdhci: Blk size: 0x00000000 | Blk cnt: 0x00000000
>> [ 38.277475] kernel: mmc0: sdhci: Argument: 0x00000000 | Trn mode: 0x00000000
>> [ 38.280125] kernel: mmc0: sdhci: Present: 0x20070000 | Host ctl: 0x00000000
>> [ 38.280206] kernel: mmc0: sdhci: Power: 0x000000bf | Blk gap: 0x00000000
>> [ 38.284511] kernel: mmc0: sdhci: Wake-up: 0x00000000 | Clock: 0x0000032f
>> [ 38.284592] kernel: mmc0: sdhci: Timeout: 0x00000007 | Int stat: 0x00000000
>> [ 38.284636] kernel: mmc0: sdhci: Int enab: 0x00ff0083 | Sig enab: 0x00ff0083
>> [ 38.287200] kernel: mmc0: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00000000
>> [ 38.287281] kernel: mmc0: sdhci: Caps: 0x396a3281 | Caps_1: 0x1803057f
>> [ 38.291212] kernel: mmc0: sdhci: Cmd: 0x00000000 | Max curr: 0x000000c8
>> [ 38.291292] kernel: mmc0: sdhci: Resp[0]: 0x00000000 | Resp[1]: 0x00000000
>> [ 38.291335] kernel: mmc0: sdhci: Resp[2]: 0x00000000 | Resp[3]: 0x00000000
>> [ 38.293513] kernel: mmc0: sdhci: Host ctl2: 0x00009107
>> [ 38.293604] kernel: mmc0: sdhci: ADMA Err: 0x00000000 | ADMA Ptr: 0x0000000000000000
>> [ 38.297842] kernel: mmc0: sdhci_uhs2: ==================== UHS2 ==================
>> [ 38.297923] kernel: mmc0: sdhci_uhs2: Blk Size: 0x00000000 | Blk Cnt: 0x00000000
>> [ 38.297968] kernel: mmc0: sdhci_uhs2: Cmd: 0x00000000 | Trn mode: 0x00000000
>> [ 38.300773] kernel: mmc0: sdhci_uhs2: Int Stat: 0x00000000 | Dev Sel : 0x00000000
>> [ 38.300853] kernel: mmc0: sdhci_uhs2: Dev Int Code: 0x00000000
>> [ 38.304739] kernel: mmc0: sdhci_uhs2: Reset: 0x00000000 | Timer: 0x000000a7
>> [ 38.304811] kernel: mmc0: sdhci_uhs2: ErrInt: 0x00000000 | ErrIntEn: 0x00030000
>> [ 38.304856] kernel: mmc0: sdhci_uhs2: ErrSigEn: 0x00030000
>> [ 38.307110] kernel: mmc0: sdhci: ============================================
>> [ 38.307201] kernel: mmc0: cannot detect UHS2 interface.
>> [ 38.310110] kernel: mmc0: failed to initial phy for UHS-II!
>> [ 38.424645] kernel: mmc0: not detect UHS2 interface in 100ms.
>> [ 38.424731] kernel: mmc0: sdhci: ============ SDHCI REGISTER DUMP ===========
>> [ 38.424758] kernel: mmc0: sdhci: Sys addr: 0x00000000 | Version: 0x00000005
>> [ 38.424782] kernel: mmc0: sdhci: Blk size: 0x00000000 | Blk cnt: 0x00000000
>> [ 38.424840] kernel: mmc0: sdhci: Argument: 0x00000000 | Trn mode: 0x00000000
>> [ 38.427603] kernel: mmc0: sdhci: Present: 0x20070000 | Host ctl: 0x00000000
>> [ 38.427659] kernel: mmc0: sdhci: Power: 0x000000bf | Blk gap: 0x00000000
>> [ 38.430579] kernel: mmc0: sdhci: Wake-up: 0x00000000 | Clock: 0x0000032f
>> [ 38.430626] kernel: mmc0: sdhci: Timeout: 0x00000007 | Int stat: 0x00000000
>> [ 38.433504] kernel: mmc0: sdhci: Int enab: 0x00ff0083 | Sig enab: 0x00ff0083
>> [ 38.433550] kernel: mmc0: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00000000
>> [ 38.437596] kernel: mmc0: sdhci: Caps: 0x396a3281 | Caps_1: 0x1803057f
>> [ 38.437641] kernel: mmc0: sdhci: Cmd: 0x00000000 | Max curr: 0x000000c8
>> [ 38.437677] kernel: mmc0: sdhci: Resp[0]: 0x00000000 | Resp[1]: 0x00000000
>> [ 38.440318] kernel: mmc0: sdhci: Resp[2]: 0x00000000 | Resp[3]: 0x00000000
>> [ 38.440345] kernel: mmc0: sdhci: Host ctl2: 0x00009107
>> [ 38.444119] kernel: mmc0: sdhci: ADMA Err: 0x00000000 | ADMA Ptr: 0x0000000000000000
>> [ 38.444161] kernel: mmc0: sdhci_uhs2: ==================== UHS2 ==================
>> [ 38.444184] kernel: mmc0: sdhci_uhs2: Blk Size: 0x00000000 | Blk Cnt: 0x00000000
>> [ 38.446918] kernel: mmc0: sdhci_uhs2: Cmd: 0x00000000 | Trn mode: 0x00000000
>> [ 38.446958] kernel: mmc0: sdhci_uhs2: Int Stat: 0x00000000 | Dev Sel : 0x00000000
>> [ 38.450833] kernel: mmc0: sdhci_uhs2: Dev Int Code: 0x00000000
>> [ 38.450874] kernel: mmc0: sdhci_uhs2: Reset: 0x00000000 | Timer: 0x000000a7
>> [ 38.450907] kernel: mmc0: sdhci_uhs2: ErrInt: 0x00000000 | ErrIntEn: 0x00030000
>> [ 38.454625] kernel: mmc0: sdhci_uhs2: ErrSigEn: 0x00030000
>> [ 38.454665] kernel: mmc0: sdhci: ============================================
>> [ 38.454699] kernel: mmc0: cannot detect UHS2 interface.
>> [ 38.456705] kernel: mmc0: failed to initial phy for UHS-II!
>>
>
> On which UHS-II card does this message appear? Please share the card
> information.
> If it is a UHS-I card, this message is normal.
If it is normal, we should not be producing error messages
and register dumps. Please change all these messages to be
debug only. The register dump can go behind DYNAMIC_DEBUG_BRANCH().
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