lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-Id: <20250306071502.96949-1-amadeus@jmu.edu.cn>
Date: Thu,  6 Mar 2025 15:15:02 +0800
From: Chukun Pan <amadeus@....edu.cn>
To: krzk@...nel.org
Cc: amadeus@....edu.cn,
	conor+dt@...nel.org,
	devicetree@...r.kernel.org,
	heiko@...ech.de,
	krzk+dt@...nel.org,
	lee@...nel.org,
	linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	linux-rockchip@...ts.infradead.org,
	robh@...nel.org,
	ziyao@...root.org
Subject: Re: [PATCH 2/2] arm64: dts: rockchip: Add rk3528 QoS register node

Hi,

>> Copy QoS nodes and add rk3528 compatible from bsp kernel,
>
> No, don't copy stuff from BSP kernel. It results in terrible DTS.

But there is no public datasheet for rk3528, it's just a minimal change.

> Did you just define syscon per few registers? Third case last weeks...
> so no, define what is your device here. 8 registers is not a device usually.

As commit 3e712a03d0481f7b0c24d961a43e385dcfa78c74 says:

---
ARM: dts: rockchip: add qos nodes found on rk3066 and rk3188

QoS nodes keep information about priorites etc on the interconnect
and loose state when the power-domain gets disabled. Therefore the
power-domain driver stores the settings of available qos nodes and
restores them when the power-domain gets enabled again.
---

I add these so they can connect to the power-domains of rk3528 SoC:

	pmu: power-management@...00000 {
		compatible = "rockchip,rk3528-pmu", "syscon", "simple-mfd";
		reg = <0x0 0xff600000 0x0 0x2000>;

		power: power-controller {
			compatible = "rockchip,rk3528-power-controller";
			#power-domain-cells = <1>;
			#address-cells = <1>;
			#size-cells = <0>;

			pd_gpu@...528_PD_GPU {
				reg = <RK3528_PD_GPU>;
				clocks = <&cru ACLK_GPU_MALI>,
					 <&cru PCLK_GPU_ROOT>;
				pm_qos = <&qos_gpu_m0>,
					 <&qos_gpu_m1>;
			};
                  ......
		};
	};

This is also what the other rockchip SoCs do.

Thanks,
Chukun

-- 
2.25.1


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ