linux-kernel - [PATCH v2 6/8] arm64: dts: qcom: Add MXC power domain to videocc node on SM8450

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Message-ID: <20250306-videocc-pll-multi-pd-voting-v2-6-0cd00612bc0e@quicinc.com>
Date: Thu, 6 Mar 2025 14:25:38 +0530
From: Jagadeesh Kona <quic_jkona@...cinc.com>
To: Bjorn Andersson <andersson@...nel.org>,
        Michael Turquette
	<mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>, Rob Herring
	<robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley
	<conor+dt@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>
CC: Ajit Pandey <quic_ajipan@...cinc.com>,
        Imran Shaik
	<quic_imrashai@...cinc.com>,
        Taniya Das <quic_tdas@...cinc.com>,
        "Satya Priya
 Kakitapalli" <quic_skakitap@...cinc.com>,
        <linux-arm-msm@...r.kernel.org>, <linux-clk@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        Jagadeesh Kona <quic_jkona@...cinc.com>,
        Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Subject: [PATCH v2 6/8] arm64: dts: qcom: Add MXC power domain to videocc
 node on SM8450

Videocc requires both MMCX and MXC rails to be powered ON to configure
the video PLLs on SM8450 platform. Hence add MXC power domain to videocc
node on SM8450.

Signed-off-by: Jagadeesh Kona <quic_jkona@...cinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
---
 arch/arm64/boot/dts/qcom/sm8450.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 9c809fc5fa45a98ff5441a0b6809931588897243..4f8dca8fc64212191780067c5d8815e3a2bb137f 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -3136,7 +3136,8 @@ videocc: clock-controller@...0000 {
 			reg = <0 0x0aaf0000 0 0x10000>;
 			clocks = <&rpmhcc RPMH_CXO_CLK>,
 				 <&gcc GCC_VIDEO_AHB_CLK>;
-			power-domains = <&rpmhpd RPMHPD_MMCX>;
+			power-domains = <&rpmhpd RPMHPD_MMCX>,
+					<&rpmhpd RPMHPD_MXC>;
 			required-opps = <&rpmhpd_opp_low_svs>;
 			#clock-cells = <1>;
 			#reset-cells = <1>;

-- 
2.34.1