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Message-ID: <4a200a7bf5f39034ce206a6c9240a307eadd45af.camel@linaro.org>
Date: Thu, 06 Mar 2025 11:24:07 +0000
From: André Draszik <andre.draszik@...aro.org>
To: Peter Griffin <peter.griffin@...aro.org>, Krzysztof Kozlowski
<krzk@...nel.org>, Sylwester Nawrocki <s.nawrocki@...sung.com>, Alim Akhtar
<alim.akhtar@...sung.com>, Linus Walleij <linus.walleij@...aro.org>
Cc: linux-arm-kernel@...ts.infradead.org, linux-samsung-soc@...r.kernel.org,
linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org,
tudor.ambarus@...aro.org, willmcvicker@...gle.com,
semen.protsenko@...aro.org, kernel-team@...roid.com,
jaewon02.kim@...sung.com, stable@...r.kernel.org
Subject: Re: [PATCH v2 1/4] pinctrl: samsung: add support for
eint_fltcon_offset
On Sat, 2025-03-01 at 11:43 +0000, Peter Griffin wrote:
> On gs101 SoC the fltcon0 (filter configuration 0) offset
> isn't at a fixed offset like previous SoCs as the fltcon1
> register only exists when there are more than 4 pins in the
> bank.
>
> Add a eint_fltcon_offset and new GS101_PIN_BANK_EINT*
> macros that take an additional fltcon_offs variable.
>
> This can then be used in suspend/resume callbacks to
> save and restore the fltcon0 and fltcon1 registers.
>
> Signed-off-by: Peter Griffin <peter.griffin@...aro.org>
> Fixes: 4a8be01a1a7a ("pinctrl: samsung: Add gs101 SoC pinctrl configuration")
> Cc: stable@...r.kernel.org
Reviewed-by: André Draszik <andre.draszik@...aro.org>
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