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Message-ID: <CAJ9a7Vh4OTZdbEygtwc7BxRJSLgkALoaNRPEiQLJQgZvFtnTtw@mail.gmail.com>
Date: Fri, 7 Mar 2025 13:33:38 +0000
From: Mike Leach <mike.leach@...aro.org>
To: songchai <quic_songchai@...cinc.com>
Cc: Suzuki K Poulose <suzuki.poulose@....com>, James Clark <james.clark@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>, Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>, Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, linux-kernel@...r.kernel.org,
coresight@...ts.linaro.org, linux-arm-kernel@...ts.infradead.org,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH v3 7/7] coresight-tgu: add reset node to initialize
Hi,
On Thu, 27 Feb 2025 at 09:27, songchai <quic_songchai@...cinc.com> wrote:
>
> From: Songwei Chai <quic_songchai@...cinc.com>
>
> Add reset node to initialize the value of
> priority/condition_decode/condition_select/timer/counter nodes
>
> Signed-off-by: Songwei Chai <quic_songchai@...cinc.com>
> Signed-off-by: songchai <quic_songchai@...cinc.com>
> ---
> .../testing/sysfs-bus-coresight-devices-tgu | 7 ++
> drivers/hwtracing/coresight/coresight-tgu.c | 79 +++++++++++++++++++
> 2 files changed, 86 insertions(+)
>
> diff --git a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tgu b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tgu
> index d88d05fbff43..8fb5afd7c655 100644
> --- a/Documentation/ABI/testing/sysfs-bus-coresight-devices-tgu
> +++ b/Documentation/ABI/testing/sysfs-bus-coresight-devices-tgu
> @@ -42,3 +42,10 @@ KernelVersion 6.15
> Contact: Jinlong Mao (QUIC) <quic_jinlmao@...cinc.com>, Sam Chai (QUIC) <quic_songchai@...cinc.com>
> Description:
> (RW) Set/Get the counter value with specific step for TGU.
> +
> +What: /sys/bus/coresight/devices/<tgu-name>/reset_tgu
> +Date: February 2025
> +KernelVersion 6.15
> +Contact: Jinlong Mao (QUIC) <quic_jinlmao@...cinc.com>, Sam Chai (QUIC) <quic_songchai@...cinc.com>
> +Description:
> + (Write) Reset the dataset for TGU.
Document the value needed to initiate the reset.
> diff --git a/drivers/hwtracing/coresight/coresight-tgu.c b/drivers/hwtracing/coresight/coresight-tgu.c
> index 693d632fb079..b36ced761c0d 100644
> --- a/drivers/hwtracing/coresight/coresight-tgu.c
> +++ b/drivers/hwtracing/coresight/coresight-tgu.c
> @@ -343,6 +343,84 @@ static ssize_t enable_tgu_store(struct device *dev,
> }
> static DEVICE_ATTR_RW(enable_tgu);
>
> +/* reset_tgu_store - Reset Trace and Gating Unit (TGU) configuration. */
> +static ssize_t reset_tgu_store(struct device *dev,
> + struct device_attribute *attr, const char *buf,
> + size_t size)
> +{
> + unsigned long value;
> + struct tgu_drvdata *drvdata = dev_get_drvdata(dev->parent);
> + int i, j, ret;
> +
> + if (kstrtoul(buf, 0, &value))
> + return -EINVAL;
> +
Check "value" here and bail out with an error code if 0.
> + if (!drvdata->enable) {
> + ret = pm_runtime_get_sync(drvdata->dev);
> + if (ret < 0) {
> + pm_runtime_put(drvdata->dev);
> + return ret;
> + }
> + }
> +
> + spin_lock(&drvdata->spinlock);
> + CS_UNLOCK(drvdata->base);
> +
> + if (value) {
drop this line
> + tgu_writel(drvdata, 0, TGU_CONTROL);
> +
> + if (drvdata->value_table->priority)
> + memset(drvdata->value_table->priority, 0,
> + MAX_PRIORITY * drvdata->max_step *
> + drvdata->max_reg * sizeof(unsigned int));
> +
> + if (drvdata->value_table->condition_decode)
> + memset(drvdata->value_table->condition_decode, 0,
> + drvdata->max_condition_decode * drvdata->max_step *
> + sizeof(unsigned int));
> +
> + /* Initialize all condition registers to NOT(value=0x1000000) */
> + for (i = 0; i < drvdata->max_step; i++) {
> + for (j = 0; j < drvdata->max_condition_decode; j++) {
> + drvdata->value_table
> + ->condition_decode[calculate_array_location(
> + drvdata, i, TGU_CONDITION_DECODE, j)] =
> + 0x1000000;
> + }
> + }
> +
> + if (drvdata->value_table->condition_select)
> + memset(drvdata->value_table->condition_select, 0,
> + drvdata->max_condition_select * drvdata->max_step *
> + sizeof(unsigned int));
> +
> + if (drvdata->value_table->timer)
> + memset(drvdata->value_table->timer, 0,
> + (drvdata->max_step) *
> + (drvdata->max_timer_counter) *
> + sizeof(unsigned int));
> +
> + if (drvdata->value_table->counter)
> + memset(drvdata->value_table->counter, 0,
> + (drvdata->max_step) *
> + (drvdata->max_timer_counter) *
> + sizeof(unsigned int));
> +
> + dev_dbg(dev, "Coresight-TGU reset complete\n");
> + } else {
> + dev_dbg(dev, "Coresight-TGU invalid input\n");
not needed if early exit on input errror
> + }
> +
> + CS_LOCK(drvdata->base);
> +
> + drvdata->enable = false;
> + spin_unlock(&drvdata->spinlock);
> + pm_runtime_put(drvdata->dev);
> +
> + return size;
> +}
> +static DEVICE_ATTR_WO(reset_tgu);
> +
> static const struct coresight_ops_helper tgu_helper_ops = {
> .enable = tgu_enable,
> .disable = tgu_disable,
> @@ -354,6 +432,7 @@ static const struct coresight_ops tgu_ops = {
>
> static struct attribute *tgu_common_attrs[] = {
> &dev_attr_enable_tgu.attr,
> + &dev_attr_reset_tgu.attr,
> NULL,
> };
>
>
Regards
Mike
--
Mike Leach
Principal Engineer, ARM Ltd.
Manchester Design Centre. UK
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