[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <20250307-winbond-6-14-rc1-octal-v1-19-45c1e074ad74@bootlin.com>
Date: Fri, 07 Mar 2025 16:08:38 +0100
From: Miquel Raynal <miquel.raynal@...tlin.com>
To: Richard Weinberger <richard@....at>,
Vignesh Raghavendra <vigneshr@...com>, Santhosh Kumar K <s-k6@...com>
Cc: Tudor Ambarus <tudor.ambarus@...aro.org>,
Pratyush Yadav <pratyush@...nel.org>, Michael Walle <michael@...le.cc>,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
Steam Lin <stlin2@...bond.com>, linux-mtd@...ts.infradead.org,
linux-kernel@...r.kernel.org, Miquel Raynal <miquel.raynal@...tlin.com>
Subject: [PATCH 19/21] mtd: spinand: Define octal load to cache operations
SPI NAND chips may support octal "program load" transfers. List the
opcodes by defining the relevant macros describing these operations.
Unfortunately, due to the hardware available I had, 0x82 and 0xc2 are
untested and given as reference, only 0xc4 could be (successfully)
tested.
Signed-off-by: Miquel Raynal <miquel.raynal@...tlin.com>
---
include/linux/mtd/spinand.h | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index ed02fa891d946c71e73d349c605447cbea48ebf9..d74557319331e76a0c5124e4b3104cf400c2fa4c 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -209,6 +209,18 @@
SPI_MEM_OP_NO_DUMMY, \
SPI_MEM_OP_DATA_OUT(len, buf, 4))
+#define SPINAND_PROG_LOAD_1S_1S_8S_OP(addr, buf, len) \
+ SPI_MEM_OP(SPI_MEM_OP_CMD(0x82, 1), \
+ SPI_MEM_OP_ADDR(2, addr, 1), \
+ SPI_MEM_OP_NO_DUMMY, \
+ SPI_MEM_OP_DATA_OUT(len, buf, 8))
+
+#define SPINAND_PROG_LOAD_1S_8S_8S_OP(reset, addr, buf, len) \
+ SPI_MEM_OP(SPI_MEM_OP_CMD(reset ? 0xc2 : 0xc4, 1), \
+ SPI_MEM_OP_ADDR(2, addr, 8), \
+ SPI_MEM_OP_NO_DUMMY, \
+ SPI_MEM_OP_DATA_OUT(len, buf, 8))
+
/**
* Standard SPI NAND flash commands
*/
--
2.48.1
Powered by blists - more mailing lists