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Message-ID:
<PAXPR04MB91855AF296383041F5FD502389D52@PAXPR04MB9185.eurprd04.prod.outlook.com>
Date: Fri, 7 Mar 2025 19:19:48 +0000
From: Shenwei Wang <shenwei.wang@....com>
To: Sherry Sun <sherry.sun@....com>, "gregkh@...uxfoundation.org"
<gregkh@...uxfoundation.org>, "jirislaby@...nel.org" <jirislaby@...nel.org>
CC: "linux-serial@...r.kernel.org" <linux-serial@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"imx@...ts.linux.dev" <imx@...ts.linux.dev>
Subject: RE: [PATCH] tty: serial: fsl_lpuart: disable transmitter before
changing RS485 related registers
> -----Original Message-----
> From: Sherry Sun <sherry.sun@....com>
> Sent: Thursday, March 6, 2025 8:20 PM
> To: gregkh@...uxfoundation.org; jirislaby@...nel.org
> Cc: linux-serial@...r.kernel.org; linux-kernel@...r.kernel.org;
> imx@...ts.linux.dev; Shenwei Wang <shenwei.wang@....com>
> Subject: [PATCH] tty: serial: fsl_lpuart: disable transmitter before changing RS485
> related registers
>
> According to the LPUART reference manual, TXRTSE and TXRTSPOL of MODIR
> register only can be changed when the transmitter is disabled.
> So disable the transmitter before changing RS485 related registers and re-enable
> it after the change is done.
>
> Fixes: 67b01837861c ("tty: serial: lpuart: Add RS485 support for 32-bit uart
> flavour")
> Signed-off-by: Sherry Sun <sherry.sun@....com>
> ---
> drivers/tty/serial/fsl_lpuart.c | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c index
> 91d02c55c470..4dc2f3e2b8e0 100644
> --- a/drivers/tty/serial/fsl_lpuart.c
> +++ b/drivers/tty/serial/fsl_lpuart.c
> @@ -1484,6 +1484,16 @@ static int lpuart32_config_rs485(struct uart_port
> *port, struct ktermios *termio
>
> unsigned long modem = lpuart32_read(&sport->port, UARTMODIR)
> & ~(UARTMODIR_TXRTSPOL |
> UARTMODIR_TXRTSE);
> + u32 ctrl;
> +
> + /* TXRTSE and TXRTSPOL only can be changed when transmitter is
> disabled. */
> + ctrl = lpuart32_read(&sport->port, UARTCTRL);
> + if (ctrl & UARTCTRL_TE) {
> + /* wait transmit engin complete */
> + lpuart32_wait_bit_set(&sport->port, UARTSTAT, UARTSTAT_TC);
> + lpuart32_write(&sport->port, ctrl & ~UARTCTRL_TE,
> UARTCTRL);
Since there may be a delay between writing to the register and the UARTCTRL_TE bit actually
changing to 0, we should poll the UARTCTRL register and verify that UARTCTRL_TE has really
become 0 before proceeding. Otherwise, subsequent operations would still execute while the
UARTCTRL_TE bit remains in the status of 1, which is not the intention of this patch.
Thanks,
Shenwei
> + }
> +
> lpuart32_write(&sport->port, modem, UARTMODIR);
>
> if (rs485->flags & SER_RS485_ENABLED) { @@ -1503,6 +1513,10 @@
> static int lpuart32_config_rs485(struct uart_port *port, struct ktermios *termio
> }
>
> lpuart32_write(&sport->port, modem, UARTMODIR);
> +
> + if (ctrl & UARTCTRL_TE)
> + lpuart32_write(&sport->port, ctrl, UARTCTRL);
> +
> return 0;
> }
>
> --
> 2.34.1
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