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Message-ID:
<PN0PR01MB1039307E64829A685052433CAFED52@PN0PR01MB10393.INDPRD01.PROD.OUTLOOK.COM>
Date: Fri, 7 Mar 2025 14:44:12 +0800
From: Chen Wang <unicorn_wang@...look.com>
To: Inochi Amaoto <inochiama@...il.com>, Thomas Gleixner
<tglx@...utronix.de>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>
Cc: linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
sophgo@...ts.linux.dev, Yixun Lan <dlan@...too.org>,
Longbin Li <looong.bin@...il.com>
Subject: Re: [PATCH v2 2/2] irqchip/sg2042-msi: Add the Sophgo SG2044 MSI
interrupt controller
On 2025/3/7 9:06, Inochi Amaoto wrote:
> Add support for Sophgo SG2044 MSI interrupt controller.
>
> Signed-off-by: Inochi Amaoto <inochiama@...il.com>
> ---
> drivers/irqchip/irq-sg2042-msi.c | 124 +++++++++++++++++++++++++------
> 1 file changed, 103 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/irqchip/irq-sg2042-msi.c b/drivers/irqchip/irq-sg2042-msi.c
> index ee682e87eb8b..183002efd86c 100644
> --- a/drivers/irqchip/irq-sg2042-msi.c
> +++ b/drivers/irqchip/irq-sg2042-msi.c
> @@ -19,21 +19,36 @@
>
> #include "irq-msi-lib.h"
>
> -#define SG2042_MAX_MSI_VECTOR 32
> +struct sg2042_msi_chip_info {
> + const struct irq_chip *irqchip;
> + const struct msi_parent_ops *parent_ops;
> +};
> +
For this new structure type, recommend to name it as "sg204x_msi_chip_info".
Others LGTM.
Reviewed-by: Chen Wang <unicorn_wang@...look.com>
> +/**
> + * struct sg204x_msi_chipdata - chip data for the SG204x MSI IRQ controller
> + * @reg_clr: clear reg, see TRM, 10.1.33, GP_INTR0_CLR
> + * @doorbell_addr: see TRM, 10.1.32, GP_INTR0_SET
> + * @irq_first: First vectors number that MSIs starts
> + * @num_irqs: Number of vectors for MSIs
> + * @msi_map: mapping for allocated MSI vectors.
> + * @msi_map_lock: Lock for msi_map
> + * @chip_info: chip specific infomations
> + */
> +struct sg204x_msi_chipdata {
> + void __iomem *reg_clr;
>
> -struct sg2042_msi_chipdata {
> - void __iomem *reg_clr; // clear reg, see TRM, 10.1.33, GP_INTR0_CLR
> + phys_addr_t doorbell_addr;
>
> - phys_addr_t doorbell_addr; // see TRM, 10.1.32, GP_INTR0_SET
> + u32 irq_first;
> + u32 num_irqs;
>
> - u32 irq_first; // The vector number that MSIs starts
> - u32 num_irqs; // The number of vectors for MSIs
> + unsigned long *msi_map;
> + struct mutex msi_map_lock;
>
> - DECLARE_BITMAP(msi_map, SG2042_MAX_MSI_VECTOR);
> - struct mutex msi_map_lock; // lock for msi_map
> + const struct sg2042_msi_chip_info *chip_info;
> };
>
> -static int sg2042_msi_allocate_hwirq(struct sg2042_msi_chipdata *data, int num_req)
> +static int sg2042_msi_allocate_hwirq(struct sg204x_msi_chipdata *data, int num_req)
> {
> int first;
>
> @@ -43,7 +58,7 @@ static int sg2042_msi_allocate_hwirq(struct sg2042_msi_chipdata *data, int num_r
> return first >= 0 ? first : -ENOSPC;
> }
>
> -static void sg2042_msi_free_hwirq(struct sg2042_msi_chipdata *data, int hwirq, int num_req)
> +static void sg2042_msi_free_hwirq(struct sg204x_msi_chipdata *data, int hwirq, int num_req)
> {
> guard(mutex)(&data->msi_map_lock);
> bitmap_release_region(data->msi_map, hwirq, get_count_order(num_req));
> @@ -51,7 +66,7 @@ static void sg2042_msi_free_hwirq(struct sg2042_msi_chipdata *data, int hwirq, i
>
> static void sg2042_msi_irq_ack(struct irq_data *d)
> {
> - struct sg2042_msi_chipdata *data = irq_data_get_irq_chip_data(d);
> + struct sg204x_msi_chipdata *data = irq_data_get_irq_chip_data(d);
> int bit_off = d->hwirq;
>
> writel(1 << bit_off, data->reg_clr);
> @@ -61,7 +76,7 @@ static void sg2042_msi_irq_ack(struct irq_data *d)
>
> static void sg2042_msi_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg)
> {
> - struct sg2042_msi_chipdata *data = irq_data_get_irq_chip_data(d);
> + struct sg204x_msi_chipdata *data = irq_data_get_irq_chip_data(d);
>
> msg->address_hi = upper_32_bits(data->doorbell_addr);
> msg->address_lo = lower_32_bits(data->doorbell_addr);
> @@ -79,9 +94,38 @@ static const struct irq_chip sg2042_msi_middle_irq_chip = {
> .irq_compose_msi_msg = sg2042_msi_irq_compose_msi_msg,
> };
>
> +static void sg2044_msi_irq_ack(struct irq_data *d)
> +{
> + struct sg204x_msi_chipdata *data = irq_data_get_irq_chip_data(d);
> +
> + writel(0, (unsigned int *)data->reg_clr + d->hwirq);
> + irq_chip_ack_parent(d);
> +}
> +
> +static void sg2044_msi_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg)
> +{
> + struct sg204x_msi_chipdata *data = irq_data_get_irq_chip_data(d);
> + phys_addr_t doorbell = data->doorbell_addr + 4 * (d->hwirq / 32);
> +
> + msg->address_lo = lower_32_bits(doorbell);
> + msg->address_hi = upper_32_bits(doorbell);
> + msg->data = d->hwirq % 32;
> +}
> +
> +static struct irq_chip sg2044_msi_middle_irq_chip = {
> + .name = "SG2044 MSI",
> + .irq_ack = sg2044_msi_irq_ack,
> + .irq_mask = irq_chip_mask_parent,
> + .irq_unmask = irq_chip_unmask_parent,
> +#ifdef CONFIG_SMP
> + .irq_set_affinity = irq_chip_set_affinity_parent,
> +#endif
> + .irq_compose_msi_msg = sg2044_msi_irq_compose_msi_msg,
> +};
> +
> static int sg2042_msi_parent_domain_alloc(struct irq_domain *domain, unsigned int virq, int hwirq)
> {
> - struct sg2042_msi_chipdata *data = domain->host_data;
> + struct sg204x_msi_chipdata *data = domain->host_data;
> struct irq_fwspec fwspec;
> struct irq_data *d;
> int ret;
> @@ -102,7 +146,7 @@ static int sg2042_msi_parent_domain_alloc(struct irq_domain *domain, unsigned in
> static int sg2042_msi_middle_domain_alloc(struct irq_domain *domain, unsigned int virq,
> unsigned int nr_irqs, void *args)
> {
> - struct sg2042_msi_chipdata *data = domain->host_data;
> + struct sg204x_msi_chipdata *data = domain->host_data;
> int hwirq, err, i;
>
> hwirq = sg2042_msi_allocate_hwirq(data, nr_irqs);
> @@ -115,7 +159,7 @@ static int sg2042_msi_middle_domain_alloc(struct irq_domain *domain, unsigned in
> goto err_hwirq;
>
> irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i,
> - &sg2042_msi_middle_irq_chip, data);
> + data->chip_info->irqchip, data);
> }
>
> return 0;
> @@ -131,7 +175,7 @@ static void sg2042_msi_middle_domain_free(struct irq_domain *domain, unsigned in
> unsigned int nr_irqs)
> {
> struct irq_data *d = irq_domain_get_irq_data(domain, virq);
> - struct sg2042_msi_chipdata *data = irq_data_get_irq_chip_data(d);
> + struct sg204x_msi_chipdata *data = irq_data_get_irq_chip_data(d);
>
> irq_domain_free_irqs_parent(domain, virq, nr_irqs);
> sg2042_msi_free_hwirq(data, d->hwirq, nr_irqs);
> @@ -157,7 +201,22 @@ static const struct msi_parent_ops sg2042_msi_parent_ops = {
> .init_dev_msi_info = msi_lib_init_dev_msi_info,
> };
>
> -static int sg2042_msi_init_domains(struct sg2042_msi_chipdata *data,
> +#define SG2044_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | \
> + MSI_FLAG_USE_DEF_CHIP_OPS)
> +
> +#define SG2044_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK | \
> + MSI_FLAG_PCI_MSIX)
> +
> +static const struct msi_parent_ops sg2044_msi_parent_ops = {
> + .required_flags = SG2044_MSI_FLAGS_REQUIRED,
> + .supported_flags = SG2044_MSI_FLAGS_SUPPORTED,
> + .bus_select_mask = MATCH_PCI_MSI,
> + .bus_select_token = DOMAIN_BUS_NEXUS,
> + .prefix = "SG2044-",
> + .init_dev_msi_info = msi_lib_init_dev_msi_info,
> +};
> +
> +static int sg2042_msi_init_domains(struct sg204x_msi_chipdata *data,
> struct irq_domain *plic_domain, struct device *dev)
> {
> struct fwnode_handle *fwnode = dev_fwnode(dev);
> @@ -173,7 +232,7 @@ static int sg2042_msi_init_domains(struct sg2042_msi_chipdata *data,
> irq_domain_update_bus_token(middle_domain, DOMAIN_BUS_NEXUS);
>
> middle_domain->flags |= IRQ_DOMAIN_FLAG_MSI_PARENT;
> - middle_domain->msi_parent_ops = &sg2042_msi_parent_ops;
> + middle_domain->msi_parent_ops = data->chip_info->parent_ops;
>
> return 0;
> }
> @@ -181,16 +240,22 @@ static int sg2042_msi_init_domains(struct sg2042_msi_chipdata *data,
> static int sg2042_msi_probe(struct platform_device *pdev)
> {
> struct fwnode_reference_args args = { };
> - struct sg2042_msi_chipdata *data;
> + struct sg204x_msi_chipdata *data;
> struct device *dev = &pdev->dev;
> struct irq_domain *plic_domain;
> struct resource *res;
> int ret;
>
> - data = devm_kzalloc(dev, sizeof(struct sg2042_msi_chipdata), GFP_KERNEL);
> + data = devm_kzalloc(dev, sizeof(struct sg204x_msi_chipdata), GFP_KERNEL);
> if (!data)
> return -ENOMEM;
>
> + data->chip_info = device_get_match_data(&pdev->dev);
> + if (!data->chip_info) {
> + dev_err(&pdev->dev, "Failed to get irqchip\n");
> + return -EINVAL;
> + }
> +
> data->reg_clr = devm_platform_ioremap_resource_byname(pdev, "clr");
> if (IS_ERR(data->reg_clr)) {
> dev_err(dev, "Failed to map clear register\n");
> @@ -231,11 +296,28 @@ static int sg2042_msi_probe(struct platform_device *pdev)
>
> mutex_init(&data->msi_map_lock);
>
> + data->msi_map = devm_bitmap_zalloc(&pdev->dev, data->num_irqs, GFP_KERNEL);
> + if (!data->msi_map) {
> + dev_err(&pdev->dev, "Unable to allocate msi mapping\n");
> + return -ENOMEM;
> + }
> +
> return sg2042_msi_init_domains(data, plic_domain, dev);
> }
>
> +static const struct sg2042_msi_chip_info sg2042_of_data = {
> + .irqchip = &sg2042_msi_middle_irq_chip,
> + .parent_ops = &sg2042_msi_parent_ops,
> +};
> +
> +static const struct sg2042_msi_chip_info sg2044_of_data = {
> + .irqchip = &sg2044_msi_middle_irq_chip,
> + .parent_ops = &sg2044_msi_parent_ops,
> +};
> +
> static const struct of_device_id sg2042_msi_of_match[] = {
> - { .compatible = "sophgo,sg2042-msi" },
> + { .compatible = "sophgo,sg2042-msi", .data = &sg2042_of_data },
> + { .compatible = "sophgo,sg2044-msi", .data = &sg2044_of_data },
> { }
> };
>
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