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Message-Id: <20250308-kona-bus-clock-v3-6-d6fb5bfc3b67@gmail.com>
Date: Sat, 08 Mar 2025 08:50:44 +0100
From: Artur Weber <aweber.kernel@...il.com>
To: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Florian Fainelli <florian.fainelli@...adcom.com>,
Ray Jui <rjui@...adcom.com>, Scott Branden <sbranden@...adcom.com>,
Broadcom internal kernel review list <bcm-kernel-feedback-list@...adcom.com>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: Alex Elder <elder@...nel.org>,
Stanislav Jakubek <stano.jakubek@...il.com>, linux-clk@...r.kernel.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
~postmarketos/upstreaming@...ts.sr.ht,
Artur Weber <aweber.kernel@...il.com>
Subject: [PATCH v3 6/9] clk: bcm21664: Add matching bus clocks for
peripheral clocks
Now that bus clock support has been implemented into the Broadcom Kona
clock driver, add bus clocks corresponding to HUB_TIMER, SDIO, UART and
BSC, as well as the USB OTG bus clock.
Signed-off-by: Artur Weber <aweber.kernel@...il.com>
---
Changes in v3:
- Adapt to CLOCK_COUNT defines being moved
Changes in v2:
- Adapt to dropped prereq clocks
---
drivers/clk/bcm/clk-bcm21664.c | 89 ++++++++++++++++++++++++++++++++++++++++--
1 file changed, 86 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/bcm/clk-bcm21664.c b/drivers/clk/bcm/clk-bcm21664.c
index fa6e1649d6f5f459b63026109caea9e2f72e22dd..53fd46d97b6514ebe228a874c63cd2cccb8a0f55 100644
--- a/drivers/clk/bcm/clk-bcm21664.c
+++ b/drivers/clk/bcm/clk-bcm21664.c
@@ -41,7 +41,12 @@ static struct peri_clk_data hub_timer_data = {
.trig = TRIGGER(0x0a40, 4),
};
-#define BCM21664_AON_CCU_CLOCK_COUNT (BCM21664_AON_CCU_HUB_TIMER + 1)
+static struct bus_clk_data hub_timer_apb_data = {
+ .gate = HW_SW_GATE(0x0414, 18, 3, 2),
+ .hyst = HYST(0x0414, 10, 11),
+};
+
+#define BCM21664_AON_CCU_CLOCK_COUNT (BCM21664_AON_CCU_HUB_TIMER_APB + 1)
static struct ccu_data aon_ccu_data = {
BCM21664_CCU_COMMON(aon, AON),
@@ -52,6 +57,8 @@ static struct ccu_data aon_ccu_data = {
.kona_clks = {
[BCM21664_AON_CCU_HUB_TIMER] =
KONA_CLK(aon, hub_timer, peri),
+ [BCM21664_AON_CCU_HUB_TIMER_APB] =
+ KONA_CLK(aon, hub_timer_apb, bus),
[BCM21664_AON_CCU_CLOCK_COUNT] = LAST_KONA_CLK,
},
};
@@ -126,7 +133,27 @@ static struct peri_clk_data sdio4_sleep_data = {
.gate = HW_SW_GATE(0x0360, 18, 2, 3),
};
-#define BCM21664_MASTER_CCU_CLOCK_COUNT (BCM21664_MASTER_CCU_SDIO4_SLEEP + 1)
+static struct bus_clk_data sdio1_ahb_data = {
+ .gate = HW_SW_GATE(0x0358, 16, 0, 1),
+};
+
+static struct bus_clk_data sdio2_ahb_data = {
+ .gate = HW_SW_GATE(0x035c, 16, 0, 1),
+};
+
+static struct bus_clk_data sdio3_ahb_data = {
+ .gate = HW_SW_GATE(0x0364, 16, 0, 1),
+};
+
+static struct bus_clk_data sdio4_ahb_data = {
+ .gate = HW_SW_GATE(0x0360, 16, 0, 1),
+};
+
+static struct bus_clk_data usb_otg_ahb_data = {
+ .gate = HW_SW_GATE(0x0348, 16, 0, 1),
+};
+
+#define BCM21664_MASTER_CCU_CLOCK_COUNT (BCM21664_MASTER_CCU_USB_OTG_AHB + 1)
static struct ccu_data master_ccu_data = {
BCM21664_CCU_COMMON(master, MASTER),
@@ -151,6 +178,16 @@ static struct ccu_data master_ccu_data = {
KONA_CLK(master, sdio3_sleep, peri),
[BCM21664_MASTER_CCU_SDIO4_SLEEP] =
KONA_CLK(master, sdio4_sleep, peri),
+ [BCM21664_MASTER_CCU_SDIO1_AHB] =
+ KONA_CLK(master, sdio1_ahb, bus),
+ [BCM21664_MASTER_CCU_SDIO2_AHB] =
+ KONA_CLK(master, sdio2_ahb, bus),
+ [BCM21664_MASTER_CCU_SDIO3_AHB] =
+ KONA_CLK(master, sdio3_ahb, bus),
+ [BCM21664_MASTER_CCU_SDIO4_AHB] =
+ KONA_CLK(master, sdio4_ahb, bus),
+ [BCM21664_MASTER_CCU_USB_OTG_AHB] =
+ KONA_CLK(master, usb_otg_ahb, bus),
[BCM21664_MASTER_CCU_CLOCK_COUNT] = LAST_KONA_CLK,
},
};
@@ -231,7 +268,39 @@ static struct peri_clk_data bsc4_data = {
.trig = TRIGGER(0x0afc, 19),
};
-#define BCM21664_SLAVE_CCU_CLOCK_COUNT (BCM21664_SLAVE_CCU_BSC4 + 1)
+static struct bus_clk_data uartb_apb_data = {
+ .gate = HW_SW_GATE_AUTO(0x0400, 16, 0, 1),
+};
+
+static struct bus_clk_data uartb2_apb_data = {
+ .gate = HW_SW_GATE_AUTO(0x0404, 16, 0, 1),
+};
+
+static struct bus_clk_data uartb3_apb_data = {
+ .gate = HW_SW_GATE_AUTO(0x0408, 16, 0, 1),
+};
+
+static struct bus_clk_data bsc1_apb_data = {
+ .gate = HW_SW_GATE_AUTO(0x0458, 16, 0, 1),
+ .hyst = HYST(0x0458, 8, 9),
+};
+
+static struct bus_clk_data bsc2_apb_data = {
+ .gate = HW_SW_GATE_AUTO(0x045c, 16, 0, 1),
+ .hyst = HYST(0x045c, 8, 9),
+};
+
+static struct bus_clk_data bsc3_apb_data = {
+ .gate = HW_SW_GATE_AUTO(0x0470, 16, 0, 1),
+ .hyst = HYST(0x0470, 8, 9),
+};
+
+static struct bus_clk_data bsc4_apb_data = {
+ .gate = HW_SW_GATE_AUTO(0x0474, 16, 0, 1),
+ .hyst = HYST(0x0474, 8, 9),
+};
+
+#define BCM21664_SLAVE_CCU_CLOCK_COUNT (BCM21664_SLAVE_CCU_BSC4_APB + 1)
static struct ccu_data slave_ccu_data = {
BCM21664_CCU_COMMON(slave, SLAVE),
@@ -254,6 +323,20 @@ static struct ccu_data slave_ccu_data = {
KONA_CLK(slave, bsc3, peri),
[BCM21664_SLAVE_CCU_BSC4] =
KONA_CLK(slave, bsc4, peri),
+ [BCM21664_SLAVE_CCU_UARTB_APB] =
+ KONA_CLK(slave, uartb_apb, bus),
+ [BCM21664_SLAVE_CCU_UARTB2_APB] =
+ KONA_CLK(slave, uartb2_apb, bus),
+ [BCM21664_SLAVE_CCU_UARTB3_APB] =
+ KONA_CLK(slave, uartb3_apb, bus),
+ [BCM21664_SLAVE_CCU_BSC1_APB] =
+ KONA_CLK(slave, bsc1_apb, bus),
+ [BCM21664_SLAVE_CCU_BSC2_APB] =
+ KONA_CLK(slave, bsc2_apb, bus),
+ [BCM21664_SLAVE_CCU_BSC3_APB] =
+ KONA_CLK(slave, bsc3_apb, bus),
+ [BCM21664_SLAVE_CCU_BSC4_APB] =
+ KONA_CLK(slave, bsc4_apb, bus),
[BCM21664_SLAVE_CCU_CLOCK_COUNT] = LAST_KONA_CLK,
},
};
--
2.48.1
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