linux-kernel - Re: [PATCH 2/2] dt-bindings: net: add enc28j60's irq-gpios node description and binding example

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <a406f363-0f2d-4ebb-8eec-053d9d148502@lunn.ch>
Date: Sun, 9 Mar 2025 16:46:48 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Hanyuan Zhao <hanyuan-z@...com>
Cc: davem@...emloft.net, kuba@...nel.org, andrew+netdev@...n.ch,
	edumazet@...gle.com, pabeni@...hat.com, netdev@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] dt-bindings: net: add enc28j60's irq-gpios node
 description and binding example

On Sun, Mar 09, 2025 at 03:48:38PM +0800, Hanyuan Zhao wrote:
> This patch allows the kernel to automatically requests the pin, configures
> it as an input, and converts it to an IRQ number, according to a GPIO
> phandle specified in device tree. This simplifies the process by
> eliminating the need to manually define pinctrl and interrupt nodes.
> Additionally, it is necessary for platforms that do not support pin
> configuration and properties via the device tree.
> 
> Signed-off-by: Hanyuan Zhao <hanyuan-z@...com>
> ---
>  .../bindings/net/microchip,enc28j60.txt       | 24 +++++++++++++++++++
>  1 file changed, 24 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/net/microchip,enc28j60.txt b/Documentation/devicetree/bindings/net/microchip,enc28j60.txt
> index a8275921a896..e6423635e55b 100644
> --- a/Documentation/devicetree/bindings/net/microchip,enc28j60.txt
> +++ b/Documentation/devicetree/bindings/net/microchip,enc28j60.txt

The DT Maintainers have a strong preference that you first convert to
yaml, and then make extension.

> @@ -8,6 +8,8 @@ the SPI master node.
>  Required properties:
>  - compatible: Should be "microchip,enc28j60"
>  - reg: Specify the SPI chip select the ENC28J60 is wired to
> +
> +Required interrupt properties with pin control subsystem:
>  - interrupts: Specify the interrupt index within the interrupt controller (referred
>                to above in interrupt-parent) and interrupt type. The ENC28J60 natively
>                generates falling edge interrupts, however, additional board logic

You should be able to use the interrupts property and just point it
at a GPIO controller that supports interrupts.

We really need a better understanding of:

> Additionally, it is necessary for platforms that do not support pin
> configuration and properties via the device tree.

    Andrew

---
pw-bot: cr