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Message-ID: <q5776ely5iwzv7uqz52fbzqybujnjfmhe7ujdj6kwqdj5wgaqe@pkkyuptjkmln>
Date: Mon, 10 Mar 2025 12:24:12 +0800
From: Inochi Amaoto <inochiama@...il.com>
To: Michael Turquette <mturquette@...libre.com>, 
	Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Chen Wang <unicorn_wang@...look.com>, Richard Cochran <richardcochran@...il.com>, 
	Inochi Amaoto <inochiama@...il.com>
Cc: linux-clk@...r.kernel.org, devicetree@...r.kernel.org, 
	sophgo@...ts.linux.dev, linux-kernel@...r.kernel.org, netdev@...r.kernel.org, 
	Yixun Lan <dlan@...too.org>, Longbin Li <looong.bin@...il.com>
Subject: Re: [PATCH v3 0/2] clk: sophgo: add SG2044 clock controller support

On Mon, Mar 10, 2025 at 12:08:32PM +0800, Inochi Amaoto wrote:
> On Thu, 27 Feb 2025 07:23:17 +0800, Inochi Amaoto wrote:
> > The clock controller of SG2044 provides multiple clocks for various
> > IPs on the SoC, including PLL, mux, div and gates. As the PLL and
> > div have obvious changed and do not fit the framework of SG2042,
> > a new implement is provided to handle these.
> > 
> > Changed from v2:
> > 1. Applied Chen Wang' tag
> > 2. patch 2: fix author mail infomation
> > 
> > [...]
> 
> Applied to for-next, thanks!
> 
> [1/2] dt-bindings: clock: sophgo: add clock controller for SG2044
>       https://github.com/sophgo/linux/commit/0332ae22ce09ce64f5e54fc2a24ed22073dbeb9d
> [2/2] clk: sophgo: Add clock controller support for SG2044 SoC
>       https://github.com/sophgo/linux/commit/fcee6f2173e7f7fb39f35899faea282fd9b5ea30
> 
> Thanks,
> Inochi
> 

Please ignore this mail, this point to a wrong url.

Regards,
Inochi

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