linux-kernel - Re: [PATCH] PCI: Enable Configuration RRS SV early

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Message-ID: <20250310184244.GA561828@bhelgaas>
Date: Mon, 10 Mar 2025 13:42:44 -0500
From: Bjorn Helgaas <helgaas@...nel.org>
To: linux-pci@...r.kernel.org
Cc: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>,
	Lukas Wunner <lukas@...ner.de>, Duc Dang <ducdang@...gle.com>,
	Alex Williamson <alex.williamson@...hat.com>,
	linux-kernel@...r.kernel.org, Bjorn Helgaas <bhelgaas@...gle.com>
Subject: Re: [PATCH] PCI: Enable Configuration RRS SV early

On Mon, Mar 03, 2025 at 03:02:17PM -0600, Bjorn Helgaas wrote:
> From: Bjorn Helgaas <bhelgaas@...gle.com>
> 
> Following a reset, a Function may respond to Config Requests with Request
> Retry Status (RRS) Completion Status to indicate that it is temporarily
> unable to process the Request, but will be able to process the Request in
> the future (PCIe r6.0, sec 2.3.1).
> 
> If the Configuration RRS Software Visibility feature is enabled and a Root
> Complex receives RRS for a config read of the Vendor ID, the Root Complex
> completes the Request to the host by returning PCI_VENDOR_ID_PCI_SIG,
> 0x0001 (sec 2.3.2).
> 
> The Config RRS SV feature applies only to Root Ports and is not directly
> related to pci_scan_bridge_extend().  Move the RRS SV enable to
> set_pcie_port_type() where we handle other PCIe-specific configuration.
> 
> Signed-off-by: Bjorn Helgaas <bhelgaas@...gle.com>

Applied to pci/enumeration for v6.15

> ---
>  drivers/pci/probe.c | 8 +++++---
>  1 file changed, 5 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
> index b6536ed599c3..0b013b196d00 100644
> --- a/drivers/pci/probe.c
> +++ b/drivers/pci/probe.c
> @@ -1373,8 +1373,6 @@ static int pci_scan_bridge_extend(struct pci_bus *bus, struct pci_dev *dev,
>  	pci_write_config_word(dev, PCI_BRIDGE_CONTROL,
>  			      bctl & ~PCI_BRIDGE_CTL_MASTER_ABORT);
>  
> -	pci_enable_rrs_sv(dev);
> -
>  	if ((secondary || subordinate) && !pcibios_assign_all_busses() &&
>  	    !is_cardbus && !broken) {
>  		unsigned int cmax, buses;
> @@ -1615,6 +1613,11 @@ void set_pcie_port_type(struct pci_dev *pdev)
>  	pdev->pcie_cap = pos;
>  	pci_read_config_word(pdev, pos + PCI_EXP_FLAGS, &reg16);
>  	pdev->pcie_flags_reg = reg16;
> +
> +	type = pci_pcie_type(pdev);
> +	if (type == PCI_EXP_TYPE_ROOT_PORT)
> +		pci_enable_rrs_sv(pdev);
> +
>  	pci_read_config_dword(pdev, pos + PCI_EXP_DEVCAP, &pdev->devcap);
>  	pdev->pcie_mpss = FIELD_GET(PCI_EXP_DEVCAP_PAYLOAD, pdev->devcap);
>  
> @@ -1631,7 +1634,6 @@ void set_pcie_port_type(struct pci_dev *pdev)
>  	 * correctly so detect impossible configurations here and correct
>  	 * the port type accordingly.
>  	 */
> -	type = pci_pcie_type(pdev);
>  	if (type == PCI_EXP_TYPE_DOWNSTREAM) {
>  		/*
>  		 * If pdev claims to be downstream port but the parent
> -- 
> 2.34.1
>