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Message-ID: <ca5e2cf0-598f-484f-a096-137baeed381d@quicinc.com>
Date: Mon, 10 Mar 2025 17:12:33 +0800
From: Jie Gan <quic_jiegan@...cinc.com>
To: Krzysztof Kozlowski <krzk@...nel.org>,
Suzuki K Poulose
<suzuki.poulose@....com>,
Mike Leach <mike.leach@...aro.org>,
James Clark
<james.clark@...aro.org>,
Alexander Shishkin
<alexander.shishkin@...ux.intel.com>,
Maxime Coquelin
<mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>
CC: Tingwei Zhang <quic_tingweiz@...cinc.com>,
Jinlong Mao
<quic_jinlmao@...cinc.com>, <coresight@...ts.linaro.org>,
<linux-arm-kernel@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-arm-msm@...r.kernel.org>,
<linux-stm32@...md-mailman.stormreply.com>
Subject: Re: [PATCH v1 4/4] arm64: dts: qcom: sa8775p: Add interrupts to CTCU
device
On 3/10/2025 5:08 PM, Krzysztof Kozlowski wrote:
> On 10/03/2025 10:04, Jie Gan wrote:
>> Add interrupts to enable byte-cntr function for TMC ETR devices.
>>
>> Signed-off-by: Jie Gan <quic_jiegan@...cinc.com>
>> ---
>> Dependency:
>> prerequisite-message-id: 20250303032931.2500935-11-quic_jiegan@...cinc.com
> Which too generated such changelog? Why this cannot be lore link?
>
> Best regards,
> Krzysztof
Hi Krzysztof,
It was entered manually. It's my fault, will fix in next version.
Thanks,
Jie
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