linux-kernel - Re: [PATCH 1/2] dt-bindings: mmc: mtk-sd: add single burst switch

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Message-ID: <322f45738a1d0b1bbcd1c5921c9bc8d955793ae6.camel@mediatek.com>
Date: Mon, 10 Mar 2025 03:31:30 +0000
From: Axe Yang (杨磊) <Axe.Yang@...iatek.com>
To: "conor@...nel.org" <conor@...nel.org>, AngeloGioacchino Del Regno
	<angelogioacchino.delregno@...labora.com>
CC: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-mediatek@...ts.infradead.org" <linux-mediatek@...ts.infradead.org>,
	"linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
	Andy-ld Lu (卢东) <Andy-ld.Lu@...iatek.com>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	Wenbin Mei (梅文彬) <Wenbin.Mei@...iatek.com>,
	Yong Mao (毛勇) <yong.mao@...iatek.com>,
	"conor+dt@...nel.org" <conor+dt@...nel.org>,
	Chaotian Jing (井朝天)
	<Chaotian.Jing@...iatek.com>, "robh@...nel.org" <robh@...nel.org>,
	"linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, "matthias.bgg@...il.com"
	<matthias.bgg@...il.com>, "ulf.hansson@...aro.org" <ulf.hansson@...aro.org>,
	"krzk+dt@...nel.org" <krzk+dt@...nel.org>,
	Qingliang Li (黎晴亮) <Qingliang.Li@...iatek.com>
Subject: Re: [PATCH 1/2] dt-bindings: mmc: mtk-sd: add single burst switch

On Fri, 2025-03-07 at 15:48 +0000, Conor Dooley wrote:
> On Fri, Mar 07, 2025 at 06:59:03AM +0000, Axe Yang (杨磊) wrote:
> > On Thu, 2025-03-06 at 10:19 +0100, AngeloGioacchino Del Regno
> > wrote:
> > > External email : Please do not click links or open attachments
> > > until
> > > you have verified the sender or the content.
> > > 
> > > 
> > > Il 06/03/25 09:48, Axe Yang ha scritto:
> > > > Add 'mediatek,disable-single-burst' setting. This property can
> > > > be
> > > > used to switch bus burst type, from single burst to INCR, which
> > > > is
> > > > determined by the bus type within the IP. Some versions of the
> > > > IP
> > > > are using AXI bus, thus this switch is necessary as 'single' is
> > > > not
> > > > the burst type supported by the bus.
> > > > 
> > > > Signed-off-by: Axe Yang <axe.yang@...iatek.com>
> > > 
> > > I am mostly sure that this is not something to put in devicetree,
> > > but
> > > as
> > > platform data for specific SoC(s), as much as I'm mostly sure
> > > that
> > > all of
> > > the instances of the MSDC IP in one SoC will be *all* using
> > > either
> > > single
> > > or INCR.
> > 
> > No, actually MSDC IPs in one SoC are using different versions.
> > Usually MSDC1 (index from 1) is used as eMMC host, the left hosts
> > are
> > used as SD/SDIO hosts. They have similar designs, but there are
> > still
> > difference.
> > 
> > > 
> > > So, I think I know the answer but I'll still ask just to be
> > > extremely
> > > sure:
> > > 
> > > is there any MediaTek SoC that has different IP versions for
> > > different MSDC
> > > instances, and that hence require single burst on one instance
> > > and
> > > INCR on
> > > another instance?
> > 
> > Yes. Actually every SoC has different IP versions for eMMC and
> > SD/SDIO
> > host as I said.
> > e.g. For MT8168, signel burst bit should be set to 1 for eMMC Host,
> > but
> > 0 for SD/SDIO Host.
> > 
> 
> Sounds like two different IPs that really should have different
> compatibles to me...

Yes, so considering all factors, adding a device tree property might be
the most appropriate approach. This method is more flexible and
convenient.
Another reason, which I didn't mention in the previous reply, is that
MediaTek has too many SoCs using MSDC. Currently, there are already 13
mtXXXX compatible structures in the msdc driver, and a significant
portion of the SoC settings can be reused by the new SoC (without
adding a compatible for new SoC). 
If we add a variable in the compatible to represent the single burst
setting for eMMC/SD/SDIO (maybe using a u8 type variable as bitmap for
different hosts, bit0 for msdc0, bit1 for msdc1, bit2 for msdc2, ...),
we might have to add a compatible for each Soc, leading to a
significant increase in the number of compatibles and making it more
complex.

Regards,
Axe

> > > 
> > > And if there is - is there a pattern? Is it always SDIO requiring
> > > INCR or
> > > always eMMC/SD requiring it?
> > > 
> > > 
> > 
> > No, there is no pattern. Both eMMC and SD/SDIO hosts need to be
> > configured base on IP version. There is no binding relationship
> > between
> > eMMC/SD/SDIO and the burst type. eMMC burst type might be INCR or
> > single, same as SD/SDIO.
> > 
> > 
> > Regards,
> > Axe
> > 
> > 
> > > 
> > > > ---
> > > >   Documentation/devicetree/bindings/mmc/mtk-sd.yaml | 8
> > > > ++++++++
> > > >   1 file changed, 8 insertions(+)
> > > > 
> > > > diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
> > > > b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
> > > > index 0debccbd6519..6076aff0a689 100644
> > > > --- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
> > > > +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml
> > > > @@ -100,6 +100,14 @@ properties:
> > > >       minimum: 0
> > > >       maximum: 0xffffffff
> > > > 
> > > > +  mediatek,disable-single-burst:
> > > > +    $ref: /schemas/types.yaml#/definitions/flag
> > > > +    description:
> > > > +      Burst type setting. For some versions of the IP that do
> > > > not
> > > > use
> > > > +      AHB bus, the burst type need to be switched to INCR.
> > > > +      If present, use INCR burst type.
> > > > +      If not present, use single burst type.
> > > > +
> > > >     mediatek,hs200-cmd-int-delay:
> > > >       $ref: /schemas/types.yaml#/definitions/uint32
> > > >       description:
> > > 
> > > 
> > >