linux-kernel - Re: [PATCH V2] tty: serial: fsl_lpuart: disable transmitter before changing RS485 related registers

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Message-ID: <be728f1f-b9bd-4d42-8ecb-9505d558543c@kernel.org>
Date: Tue, 11 Mar 2025 04:44:34 +0100
From: Jiri Slaby <jirislaby@...nel.org>
To: Sherry Sun <sherry.sun@....com>, gregkh@...uxfoundation.org
Cc: linux-serial@...r.kernel.org, linux-kernel@...r.kernel.org,
 imx@...ts.linux.dev, shenwei.wang@....com, frank.li@....com
Subject: Re: [PATCH V2] tty: serial: fsl_lpuart: disable transmitter before
 changing RS485 related registers

On 11. 03. 25, 3:55, Sherry Sun wrote:
> According to the LPUART reference manual, TXRTSE and TXRTSPOL of MODIR
> register only can be changed when the transmitter is disabled.
> So disable the transmitter before changing RS485 related registers and
> re-enable it after the change is done.
> 
> Fixes: 67b01837861c ("tty: serial: lpuart: Add RS485 support for 32-bit uart flavour")
> Signed-off-by: Sherry Sun <sherry.sun@....com>
> Reviewed-by: Frank Li <Frank.Li@....com>
> ---
> Changes in V2:
> 1. Add TE bit polling read to ensure TE is really become 0 before proceeding.
> 2. Add Reviewed-by tag.
> ---
>   drivers/tty/serial/fsl_lpuart.c | 17 +++++++++++++++++
>   1 file changed, 17 insertions(+)
> 
> diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c
> index 91d02c55c470..6b2f3a73a367 100644
> --- a/drivers/tty/serial/fsl_lpuart.c
> +++ b/drivers/tty/serial/fsl_lpuart.c
> @@ -1484,6 +1484,19 @@ static int lpuart32_config_rs485(struct uart_port *port, struct ktermios *termio
>   
>   	unsigned long modem = lpuart32_read(&sport->port, UARTMODIR)
>   				& ~(UARTMODIR_TXRTSPOL | UARTMODIR_TXRTSE);

This is unrelated, but why is the above ulong?

> +	u32 ctrl;
> +
> +	/* TXRTSE and TXRTSPOL only can be changed when transmitter is disabled. */
> +	ctrl = lpuart32_read(&sport->port, UARTCTRL);
> +	if (ctrl & UARTCTRL_TE) {
> +		/* wait transmit engin complete */

wait for the transmit engine to complete

> +		lpuart32_wait_bit_set(&sport->port, UARTSTAT, UARTSTAT_TC);

Both this ^^ and:

> +		lpuart32_write(&sport->port, ctrl & ~UARTCTRL_TE, UARTCTRL);
> +
> +		while (lpuart32_read(&sport->port, UARTCTRL) & UARTCTRL_TE)
> +			cpu_relax();

this ^^ are unbound loops in case the hardware gets mad :(.

Anyway, IIUC, after the TE clear from CTRL by the above write, the TE 
bit is really cleared by the HW from CTRL only after it is really 
disabled, so has to be checked?

> +	}
> +


thanks,
-- 
js
suse labs