linux-kernel - Re: [PATCH v3 02/18] dt-bindings: gpu: img: Add BXS-4-64 devicetree bindings

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Message-ID: <20250311-bizarre-debonair-macaque-451c4f@krzk-bin>
Date: Tue, 11 Mar 2025 08:51:48 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Matt Coster <matt.coster@...tec.com>
Cc: Frank Binns <frank.binns@...tec.com>, David Airlie <airlied@...il.com>, 
	Simona Vetter <simona@...ll.ch>, Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>, 
	Maxime Ripard <mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>, 
	Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
	Conor Dooley <conor+dt@...nel.org>, Nishanth Menon <nm@...com>, 
	Vignesh Raghavendra <vigneshr@...com>, Tero Kristo <kristo@...nel.org>, dri-devel@...ts.freedesktop.org, 
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
	linux-arm-kernel@...ts.infradead.org, Randolph Sapp <rs@...com>, Darren Etheridge <detheridge@...com>, 
	Alessio Belle <alessio.belle@...tec.com>, Alexandru Dadu <alexandru.dadu@...tec.com>
Subject: Re: [PATCH v3 02/18] dt-bindings: gpu: img: Add BXS-4-64 devicetree
 bindings

On Mon, Mar 10, 2025 at 01:10:26PM +0000, Matt Coster wrote:
> Unlike AXE-1-16M, BXS-4-64 uses two power domains.
> 
> Like the existing AXE-1-16M integration, BXS-4-64 uses the single clock
> integration in the TI k3-j721s2.
> 
> Signed-off-by: Matt Coster <matt.coster@...tec.com>
> ---
> Changes in v3:
> - Include adding the second power domain so it's in context
> - Remove unnecessary example
> - Link to v2: https://lore.kernel.org/r/20241118-sets-bxs-4-64-patch-v1-v2-8-3fd45d9fb0cf@imgtec.com
> Changes in v2:
> - Use normal reg syntax for 64-bit values
> - Link to v1: https://lore.kernel.org/r/20241105-sets-bxs-4-64-patch-v1-v1-8-4ed30e865892@imgtec.com
> ---
>  .../devicetree/bindings/gpu/img,powervr-rogue.yaml | 34 +++++++++++++++++++++-
>  1 file changed, 33 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
> index 5c16b2881447c9cda78e5bb46569e2f675d740c4..d9409d33154d429019776ddbf9d123b33f8c9740 100644
> --- a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
> +++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml
> @@ -18,6 +18,11 @@ properties:
>                - ti,am62-gpu
>            - const: img,img-axe-1-16m
>            - const: img,img-rogue
> +      - items:
> +          - enum:
> +              - ti,j721s2-gpu
> +          - const: img,img-bxs-4-64
> +          - const: img,img-rogue
>  
>        # This legacy combination of compatible strings was introduced early on
>        # before the more specific GPU identifiers were used.
> @@ -49,6 +54,7 @@ properties:
>    power-domain-names:
>      items:
>        - const: a
> +      - const: b

No, you just affected old device claiming it has two items. What's more,
it's not synced with power-domains. Both properties must have the same
constraints, but above power domains have "anything".

>  
>    dma-coherent: true
>  
> @@ -74,12 +80,38 @@ allOf:
>          - power-domains
>          - power-domain-names
>  
> +  # Cores with one power domain

Drop

> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: img,img-axe-1-16m
> +    then:
> +      properties:
> +        power-domain-names:
> +          minItems: 1

Drop

> +          maxItems: 1
> +
> +  # Cores with two power domains

Drop

> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: img,img-bxs-4-64
> +    then:
> +      properties:
> +        power-domain-names:
> +          minItems: 2
> +          maxItems: 2

Missing constraints for power-domains.

Best regards,
Krzysztof