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Message-ID: <6a73a0d3-f5fb-46cf-b55b-9f8b4af9df4c@quicinc.com>
Date: Tue, 11 Mar 2025 14:26:43 +0530
From: Jagadeesh Kona <quic_jkona@...cinc.com>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
Bjorn Andersson
<andersson@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
"Stephen
Boyd" <sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski
<krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Konrad Dybcio
<konradybcio@...nel.org>
CC: Ajit Pandey <quic_ajipan@...cinc.com>,
Imran Shaik
<quic_imrashai@...cinc.com>,
Taniya Das <quic_tdas@...cinc.com>,
"Satya Priya
Kakitapalli" <quic_skakitap@...cinc.com>,
<linux-arm-msm@...r.kernel.org>, <linux-clk@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 2/8] clk: qcom: common: Add support to configure PLL
On 3/6/2025 5:52 PM, Konrad Dybcio wrote:
> On 6.03.2025 9:55 AM, Jagadeesh Kona wrote:
>> From: Taniya Das <quic_tdas@...cinc.com>
>>
>> Integrate PLL configuration into clk_alpha_pll structure and add support
>> for qcom_cc_clk_alpha_pll_configure() function which can be used to
>> configure the clock controller PLLs from common core code.
>>
>> Signed-off-by: Taniya Das <quic_tdas@...cinc.com>
>> Signed-off-by: Jagadeesh Kona <quic_jkona@...cinc.com>
>> ---
>
> [...]
>
>> +static void qcom_cc_clk_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap)
>> +{
>> + if (!pll->config || !pll->regs)
>> + return;
>
> This should probably throw some sort of a warning
>
Yes, will add a warning here and for default case in next series.
Thanks,
Jagadeesh
>> +
>> + switch (GET_PLL_TYPE(pll)) {
>> + case CLK_ALPHA_PLL_TYPE_LUCID_OLE:
>> + clk_lucid_ole_pll_configure(pll, regmap, pll->config);
>> + break;
>> + case CLK_ALPHA_PLL_TYPE_LUCID_EVO:
>> + clk_lucid_evo_pll_configure(pll, regmap, pll->config);
>> + break;
>> + case CLK_ALPHA_PLL_TYPE_TAYCAN_ELU:
>> + clk_taycan_elu_pll_configure(pll, regmap, pll->config);
>> + break;
>> + case CLK_ALPHA_PLL_TYPE_RIVIAN_EVO:
>> + clk_rivian_evo_pll_configure(pll, regmap, pll->config);
>> + break;
>> + case CLK_ALPHA_PLL_TYPE_TRION:
>> + clk_trion_pll_configure(pll, regmap, pll->config);
>> + break;
>> + case CLK_ALPHA_PLL_TYPE_HUAYRA_2290:
>> + clk_huayra_2290_pll_configure(pll, regmap, pll->config);
>> + break;
>> + case CLK_ALPHA_PLL_TYPE_FABIA:
>> + clk_fabia_pll_configure(pll, regmap, pll->config);
>> + break;
>> + case CLK_ALPHA_PLL_TYPE_AGERA:
>> + clk_agera_pll_configure(pll, regmap, pll->config);
>> + break;
>> + case CLK_ALPHA_PLL_TYPE_PONGO_ELU:
>> + clk_pongo_elu_pll_configure(pll, regmap, pll->config);
>> + break;
>> + case CLK_ALPHA_PLL_TYPE_ZONDA:
>> + case CLK_ALPHA_PLL_TYPE_ZONDA_OLE:
>> + clk_zonda_pll_configure(pll, regmap, pll->config);
>> + break;
>> + case CLK_ALPHA_PLL_TYPE_STROMER:
>> + case CLK_ALPHA_PLL_TYPE_STROMER_PLUS:
>> + clk_stromer_pll_configure(pll, regmap, pll->config);
>> + break;
>> + case CLK_ALPHA_PLL_TYPE_DEFAULT:
>> + case CLK_ALPHA_PLL_TYPE_DEFAULT_EVO:
>> + case CLK_ALPHA_PLL_TYPE_HUAYRA:
>> + case CLK_ALPHA_PLL_TYPE_HUAYRA_APSS:
>> + case CLK_ALPHA_PLL_TYPE_BRAMMO:
>> + case CLK_ALPHA_PLL_TYPE_BRAMMO_EVO:
>> + clk_alpha_pll_configure(pll, regmap, pll->config);
>> + break;
>> + default:
>> + break;
>
> And so should the 'default' case
>
> Konrad
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