linux-kernel - Re: [PATCH v1 2/5] arm64/kvm: support set the DBM attr during memory abort

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Message-ID: <86wmcvoq5b.wl-maz@kernel.org>
Date: Tue, 11 Mar 2025 09:47:12 +0000
From: Marc Zyngier <maz@...nel.org>
To: Zhenyu Ye <yezhenyu2@...wei.com>
Cc: <yuzenghui@...wei.com>,
	<will@...nel.org>,
	<oliver.upton@...ux.dev>,
	<catalin.marinas@....com>,
	<joey.gouly@....com>,
	<linux-kernel@...r.kernel.org>,
	<xiexiangyou@...wei.com>,
	<zhengchuan@...wei.com>,
	<wangzhou1@...ilicon.com>,
	<linux-arm-kernel@...ts.infradead.org>,
	<kvm@...r.kernel.org>,
	<kvmarm@...ts.linux.dev>
Subject: Re: [PATCH v1 2/5] arm64/kvm: support set the DBM attr during memory abort

Please follow the current convention for the subject of your patch (if
you do a git log --oneline on arch/arm64/kvm, all commit should have
the same style).

On Tue, 11 Mar 2025 04:03:18 +0000,
Zhenyu Ye <yezhenyu2@...wei.com> wrote:
> 
> From: eillon <yezhenyu2@...wei.com>
> 
> Since the ARMv8, the page entry has supported the DBM attribute.
> Support set the attr during user_mem_abort().

Not quite. ARMv8.1 added DBM, and that is still, to this day, an
optional functionality, including in ARMv9.5.

> 
> Signed-off-by: eillon <yezhenyu2@...wei.com>
> ---
>  arch/arm64/include/asm/kvm_pgtable.h | 3 +++
>  arch/arm64/kvm/hyp/pgtable.c         | 6 ++++++
>  2 files changed, 9 insertions(+)
> 
> diff --git a/arch/arm64/include/asm/kvm_pgtable.h b/arch/arm64/include/asm/kvm_pgtable.h
> index 6b9d274052c7..35648d7f08f5 100644
> --- a/arch/arm64/include/asm/kvm_pgtable.h
> +++ b/arch/arm64/include/asm/kvm_pgtable.h
> @@ -86,6 +86,8 @@ typedef u64 kvm_pte_t;
>  
>  #define KVM_PTE_LEAF_ATTR_HI_S2_XN	BIT(54)
>  
> +#define KVM_PTE_LEAF_ATTR_HI_S2_DBM	BIT(51)
> +
>  #define KVM_PTE_LEAF_ATTR_HI_S1_GP	BIT(50)
>  
>  #define KVM_PTE_LEAF_ATTR_S2_PERMS	(KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R | \
> @@ -252,6 +254,7 @@ enum kvm_pgtable_prot {
>  
>  	KVM_PGTABLE_PROT_DEVICE			= BIT(3),
>  	KVM_PGTABLE_PROT_NORMAL_NC		= BIT(4),
> +	KVM_PGTABLE_PROT_DBM			= BIT(5),
>  
>  	KVM_PGTABLE_PROT_SW0			= BIT(55),
>  	KVM_PGTABLE_PROT_SW1			= BIT(56),
> diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c
> index df5cc74a7dd0..3ea6bdbc02a0 100644
> --- a/arch/arm64/kvm/hyp/pgtable.c
> +++ b/arch/arm64/kvm/hyp/pgtable.c
> @@ -700,6 +700,9 @@ static int stage2_set_prot_attr(struct kvm_pgtable *pgt, enum kvm_pgtable_prot p
>  	if (prot & KVM_PGTABLE_PROT_W)
>  		attr |= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W;
>  
> +	if (prot & KVM_PGTABLE_PROT_DBM)
> +		attr |= KVM_PTE_LEAF_ATTR_HI_S2_DBM;
> +
>  	if (!kvm_lpa2_is_enabled())
>  		attr |= FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S2_SH, sh);
>  
> @@ -1309,6 +1312,9 @@ int kvm_pgtable_stage2_relax_perms(struct kvm_pgtable *pgt, u64 addr,
>  	if (prot & KVM_PGTABLE_PROT_W)
>  		set |= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W;
>  
> +	if (prot & KVM_PGTABLE_PROT_DBM)
> +		set |= KVM_PTE_LEAF_ATTR_HI_S2_DBM;
> +

Why isn't that exclusive of PROT_W?

>  	if (prot & KVM_PGTABLE_PROT_X)
>  		clr |= KVM_PTE_LEAF_ATTR_HI_S2_XN;
>  

What is driving this KVM_PGTABLE_PROT_DBM bit?

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.