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Message-ID: <d6t25jmcf57sqpjqwykhdf3ju6v3wwpyaiumll4x6bjfhcohl5@oikmnpusjn6u>
Date: Tue, 11 Mar 2025 20:34:02 +0800
From: Inochi Amaoto <inochiama@...il.com>
To: Jonathan Corbet <corbet@....net>, 
	Paul Walmsley <paul.walmsley@...ive.com>, Palmer Dabbelt <palmer@...belt.com>, 
	Albert Ou <aou@...s.berkeley.edu>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Clément Léger <cleger@...osinc.com>, Charlie Jenkins <charlie@...osinc.com>, 
	Evan Green <evan@...osinc.com>, Andrew Jones <ajones@...tanamicro.com>, 
	Inochi Amaoto <inochiama@...il.com>, Jesse Taube <jesse@...osinc.com>, Andy Chiu <andybnac@...il.com>, 
	Alexandre Ghiti <alexghiti@...osinc.com>, Yong-Xuan Wang <yongxuan.wang@...ive.com>, 
	Yu Chien Peter Lin <peterlin@...estech.com>, Samuel Holland <samuel.holland@...ive.com>
Cc: linux-doc@...r.kernel.org, linux-riscv@...ts.infradead.org, 
	linux-kernel@...r.kernel.org, devicetree@...r.kernel.org, Yixun Lan <dlan@...too.org>, 
	Longbin Li <looong.bin@...il.com>
Subject: Re: [PATCH v4 0/3] riscv: Add bfloat16 instruction support

On Thu, Feb 13, 2025 at 08:38:44AM +0800, Inochi Amaoto wrote:
> Add description for the BFloat16 precision Floating-Point ISA extension,
> (Zfbfmin, Zvfbfmin, Zvfbfwma). which was ratified in commit 4dc23d62
> ("Added Chapter title to BF16") of the riscv-isa-manual.
> 
> Changed from v3:
> 1. rebase for v6.14-rc1
> 2. patch2: add validate for zfbfmin, zvfbfmin, zvfbfwma
> 3. patch2: apply Clément's tag
> 
> Changed from v2:
> 1. rebase for v6.13-rc1
> 
> Changed from v1:
> 1. patch3: add missing code in sys_hwprobe.c
> 
> Inochi Amaoto (3):
>   dt-bindings: riscv: add bfloat16 ISA extension description
>   riscv: add ISA extension parsing for bfloat16 ISA extension
>   riscv: hwprobe: export bfloat16 ISA extension
> 
>  Documentation/arch/riscv/hwprobe.rst          | 12 +++++
>  .../devicetree/bindings/riscv/extensions.yaml | 45 +++++++++++++++++++
>  arch/riscv/include/asm/hwcap.h                |  3 ++
>  arch/riscv/include/uapi/asm/hwprobe.h         |  3 ++
>  arch/riscv/kernel/cpufeature.c                | 35 +++++++++++++++
>  arch/riscv/kernel/sys_hwprobe.c               |  3 ++
>  6 files changed, 101 insertions(+)
> 
> --
> 2.48.1
> 

I wonder whether this patch could get merged? So I can
submit the SG2044 board dts without this as dependency.

Regards,
Inochi

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