linux-kernel - [PATCH] selftests/pidfd: align stack to fix SP alignment exception

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Message-ID: <20250312061557.28532-1-xueshuai@linux.alibaba.com>
Date: Wed, 12 Mar 2025 14:15:57 +0800
From: Shuai Xue <xueshuai@...ux.alibaba.com>
To: brauner@...nel.org,
	shuah@...nel.org,
	linux-kernel@...r.kernel.org,
	linux-kselftest@...r.kernel.org
Cc: baolin.wang@...ux.alibaba.com,
	tianruidong@...ux.alibaba.com,
	xueshuai@...ux.alibaba.com
Subject: [PATCH] selftests/pidfd: align stack to fix SP alignment exception

The pidfd_test fails on the ARM64 platform with the following error:

    Bail out! pidfd_poll check for premature notification on child thread exec test: Failed

When exception-trace is enabled, the kernel logs the details:

    #echo 1 > /proc/sys/debug/exception-trace
    #dmesg | tail -n 20
    [48628.713023] pidfd_test[1082142]: unhandled exception: SP Alignment, ESR 0x000000009a000000, SP/PC alignment exception in pidfd_test[400000+4000]
    [48628.713049] CPU: 21 PID: 1082142 Comm: pidfd_test Kdump: loaded Tainted: G        W   E      6.6.71-3_rc1.al8.aarch64 #1
    [48628.713051] Hardware name: AlibabaCloud AliServer-Xuanwu2.0AM-1UC1P-5B/AS1111MG1, BIOS 1.2.M1.AL.P.157.00 07/29/2023
    [48628.713053] pstate: 60001800 (nZCv daif -PAN -UAO -TCO -DIT +SSBS BTYPE=-c)
    [48628.713055] pc : 0000000000402100
    [48628.713056] lr : 0000ffff98288f9c
    [48628.713056] sp : 0000ffffde49daa8
    [48628.713057] x29: 0000000000000000 x28: 0000000000000000 x27: 0000000000000000
    [48628.713060] x26: 0000000000000000 x25: 0000000000000000 x24: 0000000000000000
    [48628.713062] x23: 0000000000000000 x22: 0000000000000000 x21: 0000000000400e80
    [48628.713065] x20: 0000000000000000 x19: 0000000000402650 x18: 0000000000000000
    [48628.713067] x17: 00000000004200d8 x16: 0000ffff98288f40 x15: 0000ffffde49b92c
    [48628.713070] x14: 0000000000000000 x13: 0000000000000000 x12: 0000000000000000
    [48628.713072] x11: 0000000000001011 x10: 0000000000402100 x9 : 0000000000000010
    [48628.713074] x8 : 00000000000000dc x7 : 3861616239346564 x6 : 000000000000000a
    [48628.713077] x5 : 0000ffffde49daa8 x4 : 000000000000000a x3 : 0000ffffde49daa8
    [48628.713079] x2 : 0000ffffde49dadc x1 : 0000ffffde49daa8 x0 : 0000000000000000

According to ARM ARM D1.3.10.2 SP alignment checking:

> When the SP is used as the base address of a calculation, regardless of
> any offset applied by the instruction, if bits [3:0] of the SP are not
> 0b0000, there is a misaligned SP.

To fix it, align the stack with 16 bytes.

Signed-off-by: Shuai Xue <xueshuai@...ux.alibaba.com>
---
 tools/testing/selftests/pidfd/pidfd_test.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/testing/selftests/pidfd/pidfd_test.c b/tools/testing/selftests/pidfd/pidfd_test.c
index c081ae91313a..ec161a7c3ff9 100644
--- a/tools/testing/selftests/pidfd/pidfd_test.c
+++ b/tools/testing/selftests/pidfd/pidfd_test.c
@@ -33,7 +33,7 @@ static bool have_pidfd_send_signal;
 static pid_t pidfd_clone(int flags, int *pidfd, int (*fn)(void *))
 {
 	size_t stack_size = 1024;
-	char *stack[1024] = { 0 };
+	char *stack[1024] __attribute__((aligned(16))) = {0};
 
 #ifdef __ia64__
 	return __clone2(fn, stack, stack_size, flags | SIGCHLD, NULL, pidfd);
-- 
2.39.3