linux-kernel - Re: [PATCH] iio: adc: rockchip: Fix clock initialization sequence

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Message-ID: <10623626.nUPlyArG6x@phil>
Date: Wed, 12 Mar 2025 08:00:54 +0100
From: Heiko Stuebner <heiko@...ech.de>
To: Jonathan Cameron <jic23@...nel.org>, Simon Xue <xxm@...k-chips.com>
Cc: Lars-Peter Clausen <lars@...afoo.de>,
 Andy Shevchenko <andy.shevchenko@...il.com>,
 Shreeya Patel <shreeya.patel@...labora.com>, linux-iio@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, linux-rockchip@...ts.infradead.org,
 linux-kernel@...r.kernel.org, Simon Xue <xxm@...k-chips.com>
Subject: Re: [PATCH] iio: adc: rockchip: Fix clock initialization sequence

Am Mittwoch, 12. März 2025, 07:20:16 MEZ schrieb Simon Xue:
> clock_set_rate should be executed after devm_clk_get_enabled.
> 
> Fixes: 97ad10bb2901 ("iio: adc: rockchip_saradc: Make use of devm_clk_get_enabled")
> Signed-off-by: Simon Xue <xxm@...k-chips.com>

Reviewed-by: Heiko Stuebner <heiko@...ech.de>

> ---
>  drivers/iio/adc/rockchip_saradc.c | 17 ++++++++---------
>  1 file changed, 8 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/iio/adc/rockchip_saradc.c b/drivers/iio/adc/rockchip_saradc.c
> index a29e54754c8f..ab4de67fb135 100644
> --- a/drivers/iio/adc/rockchip_saradc.c
> +++ b/drivers/iio/adc/rockchip_saradc.c
> @@ -480,15 +480,6 @@ static int rockchip_saradc_probe(struct platform_device *pdev)
>  	if (info->reset)
>  		rockchip_saradc_reset_controller(info->reset);
>  
> -	/*
> -	 * Use a default value for the converter clock.
> -	 * This may become user-configurable in the future.
> -	 */
> -	ret = clk_set_rate(info->clk, info->data->clk_rate);
> -	if (ret < 0)
> -		return dev_err_probe(&pdev->dev, ret,
> -				     "failed to set adc clk rate\n");
> -
>  	ret = regulator_enable(info->vref);
>  	if (ret < 0)
>  		return dev_err_probe(&pdev->dev, ret,
> @@ -515,6 +506,14 @@ static int rockchip_saradc_probe(struct platform_device *pdev)
>  	if (IS_ERR(info->clk))
>  		return dev_err_probe(&pdev->dev, PTR_ERR(info->clk),
>  				     "failed to get adc clock\n");
> +	/*
> +	 * Use a default value for the converter clock.
> +	 * This may become user-configurable in the future.
> +	 */
> +	ret = clk_set_rate(info->clk, info->data->clk_rate);
> +	if (ret < 0)
> +		return dev_err_probe(&pdev->dev, ret,
> +				     "failed to set adc clk rate\n");
>  
>  	platform_set_drvdata(pdev, indio_dev);
>  
>