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Message-ID: <20250312072509.3247885-3-quic_wasimn@quicinc.com>
Date: Wed, 12 Mar 2025 12:55:09 +0530
From: Wasim Nazir <quic_wasimn@...cinc.com>
To: Bjorn Andersson <andersson@...nel.org>,
Linus Walleij <linus.walleij@...aro.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
Cc: linux-arm-msm@...r.kernel.org, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
kernel@...cinc.com, Wasim Nazir <quic_wasimn@...cinc.com>
Subject: [PATCH v2 2/2] pinctrl: qcom: sa8775p: Enable egpio function
Egpio feature allows IsLand Domain IOs to be reused as TLMM GPIOs.
sa8775p supports egpio feature for GPIOs ranging from 126 to 148.
Signed-off-by: Wasim Nazir <quic_wasimn@...cinc.com>
---
drivers/pinctrl/qcom/pinctrl-sa8775p.c | 58 +++++++++++++++-----------
1 file changed, 34 insertions(+), 24 deletions(-)
diff --git a/drivers/pinctrl/qcom/pinctrl-sa8775p.c b/drivers/pinctrl/qcom/pinctrl-sa8775p.c
index 8fdea25d8d67..a5b38221aea8 100644
--- a/drivers/pinctrl/qcom/pinctrl-sa8775p.c
+++ b/drivers/pinctrl/qcom/pinctrl-sa8775p.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
- * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2022,2025, Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2023, Linaro Limited
*/
@@ -467,6 +467,7 @@ enum sa8775p_functions {
msm_mux_edp2_lcd,
msm_mux_edp3_hot,
msm_mux_edp3_lcd,
+ msm_mux_egpio,
msm_mux_emac0_mcg0,
msm_mux_emac0_mcg1,
msm_mux_emac0_mcg2,
@@ -744,6 +745,13 @@ static const char * const edp3_lcd_groups[] = {
"gpio49",
};
+static const char *const egpio_groups[] = {
+ "gpio126", "gpio127", "gpio128", "gpio129", "gpio130", "gpio131",
+ "gpio132", "gpio133", "gpio134", "gpio135", "gpio136", "gpio137",
+ "gpio138", "gpio139", "gpio140", "gpio141", "gpio142", "gpio143",
+ "gpio144", "gpio145", "gpio146", "gpio147", "gpio148",
+};
+
static const char * const emac0_mcg0_groups[] = {
"gpio12",
};
@@ -1209,6 +1217,7 @@ static const struct pinfunction sa8775p_functions[] = {
MSM_PIN_FUNCTION(edp2_lcd),
MSM_PIN_FUNCTION(edp3_hot),
MSM_PIN_FUNCTION(edp3_lcd),
+ MSM_PIN_FUNCTION(egpio),
MSM_PIN_FUNCTION(emac0_mcg0),
MSM_PIN_FUNCTION(emac0_mcg1),
MSM_PIN_FUNCTION(emac0_mcg2),
@@ -1454,29 +1463,29 @@ static const struct msm_pingroup sa8775p_groups[] = {
[123] = PINGROUP(123, hs2_mi2s, phase_flag, _, _, _, _, _, _, _),
[124] = PINGROUP(124, hs2_mi2s, phase_flag, _, _, _, _, _, _, _),
[125] = PINGROUP(125, hs2_mi2s, phase_flag, _, _, _, _, _, _, _),
- [126] = PINGROUP(126, _, _, _, _, _, _, _, _, _),
- [127] = PINGROUP(127, _, _, _, _, _, _, _, _, _),
- [128] = PINGROUP(128, _, _, _, _, _, _, _, _, _),
- [129] = PINGROUP(129, _, _, _, _, _, _, _, _, _),
- [130] = PINGROUP(130, _, _, _, _, _, _, _, _, _),
- [131] = PINGROUP(131, _, _, _, _, _, _, _, _, _),
- [132] = PINGROUP(132, _, _, _, _, _, _, _, _, _),
- [133] = PINGROUP(133, _, _, _, _, _, _, _, _, _),
- [134] = PINGROUP(134, _, _, _, _, _, _, _, _, _),
- [135] = PINGROUP(135, _, _, _, _, _, _, _, _, _),
- [136] = PINGROUP(136, _, _, _, _, _, _, _, _, _),
- [137] = PINGROUP(137, _, _, _, _, _, _, _, _, _),
- [138] = PINGROUP(138, _, _, _, _, _, _, _, _, _),
- [139] = PINGROUP(139, _, _, _, _, _, _, _, _, _),
- [140] = PINGROUP(140, _, _, _, _, _, _, _, _, _),
- [141] = PINGROUP(141, _, _, _, _, _, _, _, _, _),
- [142] = PINGROUP(142, _, _, _, _, _, _, _, _, _),
- [143] = PINGROUP(143, _, _, _, _, _, _, _, _, _),
- [144] = PINGROUP(144, dbg_out, _, _, _, _, _, _, _, _),
- [145] = PINGROUP(145, _, _, _, _, _, _, _, _, _),
- [146] = PINGROUP(146, _, _, _, _, _, _, _, _, _),
- [147] = PINGROUP(147, _, _, _, _, _, _, _, _, _),
- [148] = PINGROUP(148, _, _, _, _, _, _, _, _, _),
+ [126] = PINGROUP(126, _, _, _, _, _, _, _, _, egpio),
+ [127] = PINGROUP(127, _, _, _, _, _, _, _, _, egpio),
+ [128] = PINGROUP(128, _, _, _, _, _, _, _, _, egpio),
+ [129] = PINGROUP(129, _, _, _, _, _, _, _, _, egpio),
+ [130] = PINGROUP(130, _, _, _, _, _, _, _, _, egpio),
+ [131] = PINGROUP(131, _, _, _, _, _, _, _, _, egpio),
+ [132] = PINGROUP(132, _, _, _, _, _, _, _, _, egpio),
+ [133] = PINGROUP(133, _, _, _, _, _, _, _, _, egpio),
+ [134] = PINGROUP(134, _, _, _, _, _, _, _, _, egpio),
+ [135] = PINGROUP(135, _, _, _, _, _, _, _, _, egpio),
+ [136] = PINGROUP(136, _, _, _, _, _, _, _, _, egpio),
+ [137] = PINGROUP(137, _, _, _, _, _, _, _, _, egpio),
+ [138] = PINGROUP(138, _, _, _, _, _, _, _, _, egpio),
+ [139] = PINGROUP(139, _, _, _, _, _, _, _, _, egpio),
+ [140] = PINGROUP(140, _, _, _, _, _, _, _, _, egpio),
+ [141] = PINGROUP(141, _, _, _, _, _, _, _, _, egpio),
+ [142] = PINGROUP(142, _, _, _, _, _, _, _, _, egpio),
+ [143] = PINGROUP(143, _, _, _, _, _, _, _, _, egpio),
+ [144] = PINGROUP(144, dbg_out, _, _, _, _, _, _, _, egpio),
+ [145] = PINGROUP(145, _, _, _, _, _, _, _, _, egpio),
+ [146] = PINGROUP(146, _, _, _, _, _, _, _, _, egpio),
+ [147] = PINGROUP(147, _, _, _, _, _, _, _, _, egpio),
+ [148] = PINGROUP(148, _, _, _, _, _, _, _, _, egpio),
[149] = UFS_RESET(ufs_reset, 0x1a2000),
[150] = SDC_QDSD_PINGROUP(sdc1_rclk, 0x199000, 15, 0),
[151] = SDC_QDSD_PINGROUP(sdc1_clk, 0x199000, 13, 6),
@@ -1511,6 +1520,7 @@ static const struct msm_pinctrl_soc_data sa8775p_pinctrl = {
.ngpios = 150,
.wakeirq_map = sa8775p_pdc_map,
.nwakeirq_map = ARRAY_SIZE(sa8775p_pdc_map),
+ .egpio_func = 9,
};
static int sa8775p_pinctrl_probe(struct platform_device *pdev)
--
2.48.1
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