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Message-ID: <20250312-unloving-shamrock-babbedab8cbe@spud>
Date: Wed, 12 Mar 2025 12:50:55 +0000
From: Conor Dooley <conor@...nel.org>
To: Matthias Brugger <matthias.bgg@...nel.org>
Cc: Pinkesh Vaghela <pinkesh.vaghela@...fochips.com>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Paul Walmsley <paul.walmsley@...ive.com>,
	Samuel Holland <samuel.holland@...ive.com>,
	Palmer Dabbelt <palmer@...belt.com>,
	Albert Ou <aou@...s.berkeley.edu>,
	Daniel Lezcano <daniel.lezcano@...aro.org>,
	Min Lin <linmin@...incomputing.com>,
	Pritesh Patel <pritesh.patel@...fochips.com>,
	Yangyu Chen <cyy@...self.name>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
	Yu Chien Peter Lin <peterlin@...estech.com>,
	Charlie Jenkins <charlie@...osinc.com>,
	Kanak Shilledar <kanakshilledar@...il.com>,
	Darshan Prajapati <darshan.prajapati@...fochips.com>,
	Neil Armstrong <neil.armstrong@...aro.org>,
	Heiko Stuebner <heiko@...ech.de>, Aradhya Bhatia <a-bhatia1@...com>,
	rafal@...ecki.pl, Anup Patel <anup@...infault.org>,
	devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 04/10] dt-bindings: riscv: Add SiFive HiFive Premier P550
 board

On Wed, Mar 12, 2025 at 01:03:09PM +0100, Matthias Brugger wrote:
> On Tue, Mar 11, 2025 at 01:04:26PM +0530, Pinkesh Vaghela wrote:
> > From: Pritesh Patel <pritesh.patel@...fochips.com>
> > 
> > Add DT binding documentation for the ESWIN EIC7700 SoC and
> > HiFive Premier P550 Board
> > 
> > Signed-off-by: Pritesh Patel <pritesh.patel@...fochips.com>
> > Reviewed-by: Samuel Holland <samuel.holland@...ive.com>
> > Signed-off-by: Pinkesh Vaghela <pinkesh.vaghela@...fochips.com>
> > ---
> >  .../devicetree/bindings/riscv/eswin.yaml      | 29 +++++++++++++++++++
> >  MAINTAINERS                                   |  6 ++++
> >  2 files changed, 35 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/riscv/eswin.yaml
> > 
> > diff --git a/Documentation/devicetree/bindings/riscv/eswin.yaml b/Documentation/devicetree/bindings/riscv/eswin.yaml
> > new file mode 100644
> > index 000000000000..c603c45eef22
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/riscv/eswin.yaml
> > @@ -0,0 +1,29 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/riscv/eswin.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: ESWIN SoC-based boards
> > +
> > +maintainers:
> > +  - Min Lin <linmin@...incomputing.com>
> > +  - Pinkesh Vaghela <pinkesh.vaghela@...fochips.com>
> > +  - Pritesh Patel <pritesh.patel@...fochips.com>
> > +
> > +description:
> > +  ESWIN SoC-based boards
> > +
> > +properties:
> > +  $nodename:
> > +    const: '/'
> > +  compatible:
> > +    oneOf:
> > +      - items:
> > +          - enum:
> > +              - sifive,hifive-premier-p550
> > +          - const: eswin,eic7700
> 
> That should be the other way around. You could have, let's say eic7701
> with different peripherals but smae p550 IP core. I don't expect a new
> eic7700 with a CPU IP other then p550.

No, this is correct. The SoC is made by Eswin (eic7700) and the board
(hifive premier) by SiFive. None of the compatibles listed here are for
the IP core.

If there's another SoC with different peripherals and the same p550 IP
core, I would expect a new SoC compatible /and/ a new board compatible.

Cheers,
Conor.

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