linux-kernel - Re: [PATCH 4/6] ARM: dts: qcom: sdx75: Add QPIC NAND support

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Message-ID: <2fb1ddf6-0fca-4bf6-9970-728448f893d2@oss.qualcomm.com>
Date: Thu, 13 Mar 2025 15:36:43 +0100
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Kaushal Kumar <quic_kaushalk@...cinc.com>, vkoul@...nel.org,
        robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org,
        manivannan.sadhasivam@...aro.org, miquel.raynal@...tlin.com,
        richard@....at, vigneshr@...com, andersson@...nel.org,
        konradybcio@...nel.org, agross@...nel.org
Cc: linux-arm-msm@...r.kernel.org, dmaengine@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-mtd@...ts.infradead.org
Subject: Re: [PATCH 4/6] ARM: dts: qcom: sdx75: Add QPIC NAND support

On 3/13/25 2:09 PM, Kaushal Kumar wrote:
> Add devicetree node to enable support for QPIC
> NAND controller on Qualcomm SDX75 platform.
> Since there is no "aon" clock in SDX75, a dummy
> clock is provided.

Alter the bindings not to require it then, instead

[...]

>  
> +		qpic_nand: nand-controller@...8000 {
> +			compatible = "qcom,sdx75-nand", "qcom,sdx55-nand";
> +			reg = <0x0 0x01cc8000 0x0 0x10000>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			clocks = <&rpmhcc RPMH_QPIC_CLK>,
> +				 <&nand_clk_dummy>;
> +			clock-names = "core", "aon";
> +
> +			dmas = <&qpic_bam 0>,
> +			       <&qpic_bam 1>,
> +			       <&qpic_bam 2>;
> +			dma-names = "tx", "rx", "cmd";

Please make dma-names a vertical list, just like dmas

Konrad