[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <07c36889-10d3-4944-a039-3a30fbdca883@arm.com>
Date: Thu, 13 Mar 2025 16:18:12 +0000
From: Ryan Roberts <ryan.roberts@....com>
To: Mikołaj Lenczewski <miko.lenczewski@....com>,
suzuki.poulose@....com, yang@...amperecomputing.com, corbet@....net,
catalin.marinas@....com, will@...nel.org, jean-philippe@...aro.org,
robin.murphy@....com, joro@...tes.org, akpm@...ux-foundation.org,
mark.rutland@....com, joey.gouly@....com, maz@...nel.org,
james.morse@....com, broonie@...nel.org, anshuman.khandual@....com,
oliver.upton@...ux.dev, ioworker0@...il.com, baohua@...nel.org,
david@...hat.com, jgg@...pe.ca, shameerali.kolothum.thodi@...wei.com,
nicolinc@...dia.com, mshavit@...gle.com, jsnitsel@...hat.com,
smostafa@...gle.com, linux-doc@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
iommu@...ts.linux.dev
Subject: Re: [PATCH v3 2/3] iommu/arm: Add BBM Level 2 smmu feature
On 13/03/2025 10:41, Mikołaj Lenczewski wrote:
> For supporting BBM Level 2 for userspace mappings, we want to ensure
> that the smmu also supports its own version of BBM Level 2. Luckily, the
> smmu spec (IHI 0070G 3.21.1.3) is stricter than the aarch64 spec (DDI
> 0487K.a D8.16.2), so already guarantees that no aborts are raised when
> BBM level 2 is claimed.
>
> Add the feature and testing for it under arm_smmu_sva_supported().
>
> Signed-off-by: Mikołaj Lenczewski <miko.lenczewski@....com>
Reviewed-by: Ryan Roberts <ryan.roberts@....com>
> ---
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 3 +++
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 3 +++
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 4 ++++
> 3 files changed, 10 insertions(+)
>
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c
> index 9ba596430e7c..6ba182572788 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c
> @@ -222,6 +222,9 @@ bool arm_smmu_sva_supported(struct arm_smmu_device *smmu)
> feat_mask |= ARM_SMMU_FEAT_VAX;
> }
>
> + if (system_supports_bbml2_noabort())
> + feat_mask |= ARM_SMMU_FEAT_BBML2;
> +
> if ((smmu->features & feat_mask) != feat_mask)
> return false;
>
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> index 358072b4e293..dcee0bdec924 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> @@ -4406,6 +4406,9 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu)
> if (FIELD_GET(IDR3_RIL, reg))
> smmu->features |= ARM_SMMU_FEAT_RANGE_INV;
>
> + if (FIELD_GET(IDR3_BBML, reg) == IDR3_BBML2)
> + smmu->features |= ARM_SMMU_FEAT_BBML2;
> +
> /* IDR5 */
> reg = readl_relaxed(smmu->base + ARM_SMMU_IDR5);
>
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> index bd9d7c85576a..85eaf3ab88c2 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
> @@ -60,6 +60,9 @@ struct arm_smmu_device;
> #define ARM_SMMU_IDR3 0xc
> #define IDR3_FWB (1 << 8)
> #define IDR3_RIL (1 << 10)
> +#define IDR3_BBML GENMASK(12, 11)
> +#define IDR3_BBML1 (1 << 11)
> +#define IDR3_BBML2 (2 << 11)
>
> #define ARM_SMMU_IDR5 0x14
> #define IDR5_STALL_MAX GENMASK(31, 16)
> @@ -754,6 +757,7 @@ struct arm_smmu_device {
> #define ARM_SMMU_FEAT_HA (1 << 21)
> #define ARM_SMMU_FEAT_HD (1 << 22)
> #define ARM_SMMU_FEAT_S2FWB (1 << 23)
> +#define ARM_SMMU_FEAT_BBML2 (1 << 24)
> u32 features;
>
> #define ARM_SMMU_OPT_SKIP_PREFETCH (1 << 0)
Powered by blists - more mailing lists