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Message-ID: <74ffed53-d6df-437a-b997-62fef3ee4d00@ideasonboard.com>
Date: Thu, 13 Mar 2025 11:41:22 +0200
From: Tomi Valkeinen <tomi.valkeinen@...asonboard.com>
To: Devarsh Thakkar <devarsht@...com>
Cc: praneeth@...com, vigneshr@...com, aradhya.bhatia@...ux.dev,
s-jain1@...com, r-donadkar@...com, j-choudhary@...com, h-shenoy@...com,
jyri.sarha@....fi, airlied@...il.com, maarten.lankhorst@...ux.intel.com,
mripard@...nel.org, tzimmermann@...e.de, dri-devel@...ts.freedesktop.org,
simona@...ll.ch, linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org
Subject: Re: [PATCH v3 3/3] drm/tidss: Add support for AM62L display subsystem
Hi,
On 06/03/2025 15:29, Devarsh Thakkar wrote:
> Enable display for AM62L DSS [1] which supports only a single display
> pipeline using a single overlay manager, single video port and a single
> video lite pipeline which does not support scaling.
>
> The output of video port is routed to SoC boundary via DPI interface and
> the DPI signals from the video port are also routed to DSI Tx controller
> present within the SoC.
>
> [1]: Section 11.7 (Display Subsystem and Peripherals)
> Link : https://www.ti.com/lit/pdf/sprujb4
>
> Signed-off-by: Devarsh Thakkar <devarsht@...com>
> ---
> V3:
> - Rebase on top of
> 0002-drm-tidss-Update-infra-to-support-DSS7-cut-down-vers.patch
> - Use the generic "tidss_am65x_common_regs" as common reg space
> instead of creating a new one.
>
> V2:
> - Add separate common reg space for AM62L
> - Add separate irq enable/disable/read/clear helpers for AM62L
> - Use separate helper function for setting overlay attributes
> - Drop Reviewed-by: Tomi Valkeinen <tomi.valkeinen@...asonboard.com>
> due to additional changes made in V2.
>
> drivers/gpu/drm/tidss/tidss_dispc.c | 46 +++++++++++++++++++++++++++++
> drivers/gpu/drm/tidss/tidss_dispc.h | 2 ++
> drivers/gpu/drm/tidss/tidss_drv.c | 1 +
> 3 files changed, 49 insertions(+)
>
> diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/tidss_dispc.c
> index 9b46403dbb0c..0ca0c2106715 100644
> --- a/drivers/gpu/drm/tidss/tidss_dispc.c
> +++ b/drivers/gpu/drm/tidss/tidss_dispc.c
> @@ -440,6 +440,47 @@ const struct dispc_features dispc_am62a7_feats = {
> .vid_order = {1, 0},
> };
>
> +const struct dispc_features dispc_am62l_feats = {
> + .max_pclk_khz = {
> + [DISPC_VP_DPI] = 165000,
> + },
> +
> + .subrev = DISPC_AM62L,
> +
> + .common = "common",
> + .common_regs = tidss_am65x_common_regs,
> +
> + .num_vps = 1,
> + .vp_name = { "vp1" },
> + .ovr_name = { "ovr1" },
> + .vpclk_name = { "vp1" },
> + .vp_bus_type = { DISPC_VP_DPI },
> +
> + .vp_feat = { .color = {
> + .has_ctm = true,
> + .gamma_size = 256,
> + .gamma_type = TIDSS_GAMMA_8BIT,
> + },
> + },
> +
> + .num_planes = 2,
> +
> + .vid_info = {
> + {
> + .vid_name = "vid",
> + .vid_lite = false,
> + .is_present = false,
> + },
> + {
> + .vid_name = "vidl1",
> + .vid_lite = true,
> + .is_present = true,
> + }
> + },
I don't think this is a good idea. Now you have tidss->num_planes 1, and
feat->num_planes 2. It get's very confusing.
The naming is also mixed up. You have "vid_info" field, which has
"plane_info" entries...
My suggestion is to have entries in vid_info only for the instantiated
vids, like this:
struct vid_info {
u32 hw_id;
const char *name; /* Should match dt reg names */
bool is_lite;
};
While at it, let's change the num_planes name in the feat struct too, to
num_vids. This will also highlight all the places in the code that use
the vid structs.
For AM62L it would be:
.num_vids = 1,
{
.hw_id = 1,
.name = "vidl1",
.is_lite = true,
}
Tomi
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