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Message-ID: <ac5673a7-d573-42ca-8535-254e2c1083aa@sirena.org.uk>
Date: Thu, 13 Mar 2025 12:59:20 +0000
From: Mark Brown <broonie@...nel.org>
To: Md Sadre Alam <quic_mdalam@...cinc.com>
Cc: manivannan.sadhasivam@...aro.org, miquel.raynal@...tlin.com,
richard@....at, vigneshr@...com, bbrezillon@...nel.org,
linux-mtd@...ts.infradead.org, linux-arm-msm@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-spi@...r.kernel.org
Subject: Re: [PATCH v3 4/4] spi: spi-qpic-snand: set nandc_offset for ipq9574
On Mon, Mar 10, 2025 at 05:39:06PM +0530, Md Sadre Alam wrote:
> The BAM block expects NAND register addresses to be computed based on
> the NAND register offset from QPIC base. This value is 0x30000 for
> ipq9574. Update the 'nandc_offset' value in the qcom_nandc_props
> appropriately.
Acked-by: Mark Brown <broonie@...nel.org>
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