[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <f575f3f0-b6cb-4ef6-a522-0ddced78476f@arm.com>
Date: Fri, 14 Mar 2025 16:25:24 +0000
From: Steven Price <steven.price@....com>
To: Ariel D'Alessandro <ariel.dalessandro@...labora.com>,
dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org
Cc: boris.brezillon@...labora.com, robh@...nel.org,
maarten.lankhorst@...ux.intel.com, mripard@...nel.org, tzimmermann@...e.de,
airlied@...il.com, simona@...ll.ch, kernel@...labora.com,
linux-mediatek@...ts.infradead.org, linux-arm-kernel@...ts.infradead.org,
sjoerd@...labora.com
Subject: Re: [PATCH v1 6/6] drm/panfrost: Set HW_FEATURE_AARCH64_MMU feature
flag on Bifrost models
On 10/03/2025 19:59, Ariel D'Alessandro wrote:
> Set this feature flag on all Mali Bifrost platforms as the MMU supports
> AARCH64 4K page table format.
>
> Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@...labora.com>
Reviewed-by: Steven Price <steven.price@....com>
> ---
> drivers/gpu/drm/panfrost/panfrost_features.h | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/panfrost/panfrost_features.h b/drivers/gpu/drm/panfrost/panfrost_features.h
> index 7ed0cd3ea2d4c..52f9d69f6db9d 100644
> --- a/drivers/gpu/drm/panfrost/panfrost_features.h
> +++ b/drivers/gpu/drm/panfrost/panfrost_features.h
> @@ -54,6 +54,7 @@ enum panfrost_hw_feature {
> BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT) | \
> BIT_ULL(HW_FEATURE_FLUSH_REDUCTION) | \
> BIT_ULL(HW_FEATURE_PROTECTED_MODE) | \
> + BIT_ULL(HW_FEATURE_AARCH64_MMU) | \
> BIT_ULL(HW_FEATURE_COHERENCY_REG))
>
> #define hw_features_g72 (\
> @@ -64,6 +65,7 @@ enum panfrost_hw_feature {
> BIT_ULL(HW_FEATURE_FLUSH_REDUCTION) | \
> BIT_ULL(HW_FEATURE_PROTECTED_MODE) | \
> BIT_ULL(HW_FEATURE_PROTECTED_DEBUG_MODE) | \
> + BIT_ULL(HW_FEATURE_AARCH64_MMU) | \
> BIT_ULL(HW_FEATURE_COHERENCY_REG))
>
> #define hw_features_g51 hw_features_g72
> @@ -77,6 +79,7 @@ enum panfrost_hw_feature {
> BIT_ULL(HW_FEATURE_PROTECTED_MODE) | \
> BIT_ULL(HW_FEATURE_PROTECTED_DEBUG_MODE) | \
> BIT_ULL(HW_FEATURE_IDVS_GROUP_SIZE) | \
> + BIT_ULL(HW_FEATURE_AARCH64_MMU) | \
> BIT_ULL(HW_FEATURE_COHERENCY_REG))
>
> #define hw_features_g76 (\
Powered by blists - more mailing lists