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Message-ID: <0c6cb801-5592-4449-b776-a337161b3326@lunn.ch>
Date: Fri, 14 Mar 2025 20:41:33 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Christian Marangi <ansuelsmth@...il.com>
Cc: "Russell King (Oracle)" <linux@...linux.org.uk>,
	Lee Jones <lee@...nel.org>, Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Andrew Lunn <andrew+netdev@...n.ch>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	Vladimir Oltean <olteanv@...il.com>,
	Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
	Heiner Kallweit <hkallweit1@...il.com>,
	Maxime Chevallier <maxime.chevallier@...tlin.com>,
	Matthias Brugger <matthias.bgg@...il.com>,
	AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	linux-mediatek@...ts.infradead.org, netdev@...r.kernel.org,
	upstream@...oha.com
Subject: Re: [net-next PATCH v12 07/13] net: mdio: regmap: add support for
 multiple valid addr

On Sun, Mar 09, 2025 at 06:45:43PM +0100, Christian Marangi wrote:
> On Sun, Mar 09, 2025 at 05:36:49PM +0000, Russell King (Oracle) wrote:
> > On Sun, Mar 09, 2025 at 06:26:52PM +0100, Christian Marangi wrote:
> > > +/* If a non empty valid_addr_mask is passed, PHY address and
> > > + * read/write register are encoded in the regmap register
> > > + * by placing the register in the first 16 bits and the PHY address
> > > + * right after.
> > > + */
> > > +#define MDIO_REGMAP_PHY_ADDR		GENMASK(20, 16)
> > > +#define MDIO_REGMAP_PHY_REG		GENMASK(15, 0)
> > 
> > Clause 45 PHYs have 5 bits of PHY address, then 5 bits of mmd address,
> > and then 16 bits of register address - significant in that order. Can
> > we adjust the mask for the PHY address later to add the MMD between
> > the PHY address and register number?
> >
> 
> Honestly to future proof this, I think a good idea might be to add
> helper to encode these info and use Clause 45 format even for C22.
> Maybe we can use an extra bit to signal if the format is C22 or C45.
> 
> BIT(26) 0: C22 1:C45
> GENMASK(25, 21) PHY ADDR
> GENMASK(20, 16) MMD ADDR
> GENMASK(15, 0) REG

If you look back at older kernels, there was some helpers to do
something like this, but the C22/C45 was in bit 31. When i cleaned up
MDIO drivers to have separate C22 and C45 read/write functions, they
become redundant and they were removed. You might want to bring them
back again.

	Andrew

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