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Message-ID: <b2bd3258-51bd-462a-ae29-71f1d6f823f3@nvidia.com>
Date: Fri, 14 Mar 2025 18:41:28 +0530
From: Sumit Gupta <sumitg@...dia.com>
To: Pierre Gondois <pierre.gondois@....com>, <rafael@...nel.org>,
<viresh.kumar@...aro.org>, <lenb@...nel.org>, <robert.moore@...el.com>,
<corbet@....net>, <linux-pm@...r.kernel.org>, <linux-acpi@...r.kernel.org>,
<linux-doc@...r.kernel.org>, <acpica-devel@...ts.linux.dev>,
<linux-kernel@...r.kernel.org>
CC: <linux-tegra@...r.kernel.org>, <treding@...dia.com>,
<jonathanh@...dia.com>, <sashal@...dia.com>, <vsethi@...dia.com>,
<ksitaraman@...dia.com>, <sanjayc@...dia.com>, <bbasu@...dia.com>, "Sumit
Gupta" <sumitg@...dia.com>
Subject: Re: [Patch 3/5] ACPI: CPPC: support updating epp, auto_sel and
{min|max_perf} from sysfs
On 24/02/25 15:54, Pierre Gondois wrote:
> External email: Use caution opening links or attachments
>
>
> Hello Sumit,
>
> On 2/11/25 11:37, Sumit Gupta wrote:
>> Add support to update the CPC registers used for Autonomous
>> Performance Level Selection from acpi_cppc sysfs store nodes.
>> Registers supported for updation are:
>> - Engergy Performance Preference (EPP): energy_perf
>> - Autonomous Selection: auto_sel
>> - Maximum Performance: max_perf
>> - Minimum Performance: min_perf
>>
>> Also, enable show nodes to read of the following CPC registers:
>> - Performance Limited: perf_limited
>> - Autonomous Activity Window: auto_activity_window
>>
>> Signed-off-by: Sumit Gupta <sumitg@...dia.com>
>> ---
>> drivers/acpi/cppc_acpi.c | 191 ++++++++++++++++++++++++++++++++++++---
>> include/acpi/cppc_acpi.h | 5 +
>> 2 files changed, 183 insertions(+), 13 deletions(-)
>>
>> diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c
>> index cc2bf958e84f..c60ad66ece85 100644
>> --- a/drivers/acpi/cppc_acpi.c
>> +++ b/drivers/acpi/cppc_acpi.c
>
> [...]
>
>> sysfs_cppc_data(cppc_get_perf_caps, cppc_perf_caps, highest_perf, ro);
>> sysfs_cppc_data(cppc_get_perf_caps, cppc_perf_caps, lowest_perf, ro);
>> sysfs_cppc_data(cppc_get_perf_caps, cppc_perf_caps, nominal_perf, ro);
>> @@ -177,9 +304,16 @@ sysfs_cppc_data(cppc_get_perf_caps,
>> cppc_perf_caps, lowest_nonlinear_perf, ro);
>> sysfs_cppc_data(cppc_get_perf_caps, cppc_perf_caps, guaranteed_perf,
>> ro);
>> sysfs_cppc_data(cppc_get_perf_caps, cppc_perf_caps, lowest_freq, ro);
>> sysfs_cppc_data(cppc_get_perf_caps, cppc_perf_caps, nominal_freq, ro);
>> +sysfs_cppc_data(cppc_get_perf_caps, cppc_perf_caps, auto_sel, rw);
>>
>> sysfs_cppc_data(cppc_get_perf_fb_ctrs, cppc_perf_fb_ctrs,
>> reference_perf, ro);
>> sysfs_cppc_data(cppc_get_perf_fb_ctrs, cppc_perf_fb_ctrs,
>> wraparound_time, ro);
>> +sysfs_cppc_data(cppc_get_perf_fb_ctrs, cppc_perf_fb_ctrs,
>> perf_limited, ro);
>> +
>> +sysfs_cppc_data(cppc_get_perf_ctrls, cppc_perf_ctrls, min_perf, rw);
>> +sysfs_cppc_data(cppc_get_perf_ctrls, cppc_perf_ctrls, max_perf, rw);
>
> IIUC, this means that users can modify the min/max performance levels of
> the CPU
> without having the cpufreq framework notified. Meaning that if a user
> modifies these
> levels, the frequency selection will be done using the initial min/max
> performance
> level.
> I think it would be better not allow users to modifies these values
> directly. Reliying
> on existing scaling_min_freq/scaling_max_freq files would be better IMO.
>
> Regards,
> Pierre
Hi Pierre,
Sorry to get back late on this.
Providing the option to modify these registers from sysfs will help to
easily tune for Power and Performance.
When min/max_perf are updated or auto_sel is enabled from sysfs, the
policy min/max can also be updated with those values.
When auto_sel is disabled for a CPU from sysfs, then its policy min/max
can be updated back to the nominal_perf and lowest_non_linear_perf.
Was thinking of doing this in v2 after conclusion of [1].
[1]
https://lore.kernel.org/lkml/f0f1b31b-a0fc-4d21-8b79-c896833dae35@nvidia.com/
Best Regards,
Sumit Gupta
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