linux-kernel - Re: [PATCH v12 04/13] PCI: dwc: Consolidate devicetree handling in dw_pcie_host_get

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Message-ID: <Z9Ym/MROIgAOvk+8@lizhi-Precision-Tower-5810>
Date: Sat, 15 Mar 2025 21:18:52 -0400
From: Frank Li <Frank.li@....com>
To: Bjorn Helgaas <helgaas@...nel.org>
Cc: Rob Herring <robh@...nel.org>, Saravana Kannan <saravanak@...gle.com>,
	Jingoo Han <jingoohan1@...il.com>,
	Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
	Lorenzo Pieralisi <lpieralisi@...nel.org>,
	Krzysztof Wilczyński <kw@...ux.com>,
	Richard Zhu <hongxing.zhu@....com>,
	Lucas Stach <l.stach@...gutronix.de>,
	Shawn Guo <shawnguo@...nel.org>,
	Sascha Hauer <s.hauer@...gutronix.de>,
	Fabio Estevam <festevam@...il.com>,
	Niklas Cassel <cassel@...nel.org>,
	Pengutronix Kernel Team <kernel@...gutronix.de>,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-pci@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	imx@...ts.linux.dev, Bjorn Helgaas <bhelgaas@...gle.com>
Subject: Re: [PATCH v12 04/13] PCI: dwc: Consolidate devicetree handling in
 dw_pcie_host_get_resources()

On Sat, Mar 15, 2025 at 03:15:39PM -0500, Bjorn Helgaas wrote:
> From: Bjorn Helgaas <bhelgaas@...gle.com>
>
> Consolidate devicetree resource handling in dw_pcie_host_get_resources().
> No functional change intended.
>
> Signed-off-by: Bjorn Helgaas <bhelgaas@...gle.com>

Reviewed-by: Frank Li <Frank.Li@....com>

> ---
>  .../pci/controller/dwc/pcie-designware-host.c | 37 +++++++++++++------
>  1 file changed, 25 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> index 5636243fb90e..9ce06b1ee266 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -418,25 +418,15 @@ static void dw_pcie_host_request_msg_tlp_res(struct dw_pcie_rp *pp)
>  	}
>  }
>
> -int dw_pcie_host_init(struct dw_pcie_rp *pp)
> +static int dw_pcie_host_get_resources(struct dw_pcie_rp *pp)
>  {
>  	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
>  	struct device *dev = pci->dev;
> -	struct device_node *np = dev->of_node;
>  	struct platform_device *pdev = to_platform_device(dev);
>  	struct resource_entry *win;
> -	struct pci_host_bridge *bridge;
>  	struct resource *res;
>  	int ret;
>
> -	raw_spin_lock_init(&pp->lock);
> -
> -	bridge = devm_pci_alloc_host_bridge(dev, 0);
> -	if (!bridge)
> -		return -ENOMEM;
> -
> -	pp->bridge = bridge;
> -
>  	ret = dw_pcie_get_resources(pci);
>  	if (ret)
>  		return ret;
> @@ -455,13 +445,36 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
>  		return PTR_ERR(pp->va_cfg0_base);
>
>  	/* Get the I/O range from DT */
> -	win = resource_list_first_type(&bridge->windows, IORESOURCE_IO);
> +	win = resource_list_first_type(&pp->bridge->windows, IORESOURCE_IO);
>  	if (win) {
>  		pp->io_size = resource_size(win->res);
>  		pp->io_bus_addr = win->res->start - win->offset;
>  		pp->io_base = pci_pio_to_address(win->res->start);
>  	}
>
> +	return 0;
> +}
> +
> +int dw_pcie_host_init(struct dw_pcie_rp *pp)
> +{
> +	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
> +	struct device *dev = pci->dev;
> +	struct device_node *np = dev->of_node;
> +	struct pci_host_bridge *bridge;
> +	int ret;
> +
> +	raw_spin_lock_init(&pp->lock);
> +
> +	bridge = devm_pci_alloc_host_bridge(dev, 0);
> +	if (!bridge)
> +		return -ENOMEM;
> +
> +	pp->bridge = bridge;
> +
> +	ret = dw_pcie_host_get_resources(pp);
> +	if (ret)
> +		return ret;
> +
>  	/* Set default bus ops */
>  	bridge->ops = &dw_pcie_ops;
>  	bridge->child_ops = &dw_child_pcie_ops;
> --
> 2.34.1
>