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Message-ID: <Z9YqwXG5yrQX8Mep@lizhi-Precision-Tower-5810>
Date: Sat, 15 Mar 2025 21:34:57 -0400
From: Frank Li <Frank.li@....com>
To: Bjorn Helgaas <helgaas@...nel.org>
Cc: Rob Herring <robh@...nel.org>, Saravana Kannan <saravanak@...gle.com>,
Jingoo Han <jingoohan1@...il.com>,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Krzysztof Wilczyński <kw@...ux.com>,
Richard Zhu <hongxing.zhu@....com>,
Lucas Stach <l.stach@...gutronix.de>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
Niklas Cassel <cassel@...nel.org>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-pci@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
imx@...ts.linux.dev, Bjorn Helgaas <bhelgaas@...gle.com>
Subject: Re: [PATCH v12 12/13] PCI: dwc: Use parent_bus_offset to remove need
for .cpu_addr_fixup()
On Sat, Mar 15, 2025 at 03:15:47PM -0500, Bjorn Helgaas wrote:
> From: Frank Li <Frank.Li@....com>
>
> We know the parent_bus_offset, either computed from a DT reg property (the
> offset is the CPU physical addr - the 'config'/'addr_space' address on the
> parent bus) or from a .cpu_addr_fixup() (which may have used a host bridge
> window offset).
>
> Apply that parent_bus_offset instead of calling .cpu_addr_fixup() when
> programming the ATU.
>
> This assumes all intermediate addresses are at the same offset from the CPU
> physical addresses.
>
> Link: https://lore.kernel.org/r/20250313-pci_fixup_addr-v11-9-01d2313502ab@nxp.com
> Signed-off-by: Frank Li <Frank.Li@....com>
> [bhelgaas: commit log]
> Signed-off-by: Bjorn Helgaas <bhelgaas@...gle.com>
look good
Frank
> ---
> drivers/pci/controller/dwc/pcie-designware-ep.c | 5 +++--
> drivers/pci/controller/dwc/pcie-designware-host.c | 12 ++++++------
> drivers/pci/controller/dwc/pcie-designware.c | 3 ---
> 3 files changed, 9 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
> index 2ef9964fa080..c1feaadb046a 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-ep.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
> @@ -314,7 +314,8 @@ static void dw_pcie_ep_unmap_addr(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
> struct dw_pcie_ep *ep = epc_get_drvdata(epc);
> struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
>
> - ret = dw_pcie_find_index(ep, addr, &atu_index);
> + ret = dw_pcie_find_index(ep, addr - pci->parent_bus_offset,
> + &atu_index);
> if (ret < 0)
> return;
>
> @@ -333,7 +334,7 @@ static int dw_pcie_ep_map_addr(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
>
> atu.func_no = func_no;
> atu.type = PCIE_ATU_TYPE_MEM;
> - atu.parent_bus_addr = addr;
> + atu.parent_bus_addr = addr - pci->parent_bus_offset;
> atu.pci_addr = pci_addr;
> atu.size = size;
> ret = dw_pcie_ep_outbound_atu(ep, &atu);
> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> index 9e38ac7d1bcb..d760abcbb785 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -635,7 +635,7 @@ static void __iomem *dw_pcie_other_conf_map_bus(struct pci_bus *bus,
> type = PCIE_ATU_TYPE_CFG1;
>
> atu.type = type;
> - atu.parent_bus_addr = pp->cfg0_base;
> + atu.parent_bus_addr = pp->cfg0_base - pci->parent_bus_offset;
> atu.pci_addr = busdev;
> atu.size = pp->cfg0_size;
>
> @@ -660,7 +660,7 @@ static int dw_pcie_rd_other_conf(struct pci_bus *bus, unsigned int devfn,
>
> if (pp->cfg0_io_shared) {
> atu.type = PCIE_ATU_TYPE_IO;
> - atu.parent_bus_addr = pp->io_base;
> + atu.parent_bus_addr = pp->io_base - pci->parent_bus_offset;
> atu.pci_addr = pp->io_bus_addr;
> atu.size = pp->io_size;
>
> @@ -686,7 +686,7 @@ static int dw_pcie_wr_other_conf(struct pci_bus *bus, unsigned int devfn,
>
> if (pp->cfg0_io_shared) {
> atu.type = PCIE_ATU_TYPE_IO;
> - atu.parent_bus_addr = pp->io_base;
> + atu.parent_bus_addr = pp->io_base - pci->parent_bus_offset;
> atu.pci_addr = pp->io_bus_addr;
> atu.size = pp->io_size;
>
> @@ -755,7 +755,7 @@ static int dw_pcie_iatu_setup(struct dw_pcie_rp *pp)
>
> atu.index = i;
> atu.type = PCIE_ATU_TYPE_MEM;
> - atu.parent_bus_addr = entry->res->start;
> + atu.parent_bus_addr = entry->res->start - pci->parent_bus_offset;
> atu.pci_addr = entry->res->start - entry->offset;
>
> /* Adjust iATU size if MSG TLP region was allocated before */
> @@ -777,7 +777,7 @@ static int dw_pcie_iatu_setup(struct dw_pcie_rp *pp)
> if (pci->num_ob_windows > ++i) {
> atu.index = i;
> atu.type = PCIE_ATU_TYPE_IO;
> - atu.parent_bus_addr = pp->io_base;
> + atu.parent_bus_addr = pp->io_base - pci->parent_bus_offset;
> atu.pci_addr = pp->io_bus_addr;
> atu.size = pp->io_size;
>
> @@ -921,7 +921,7 @@ static int dw_pcie_pme_turn_off(struct dw_pcie *pci)
> atu.size = resource_size(pci->pp.msg_res);
> atu.index = pci->pp.msg_atu_index;
>
> - atu.parent_bus_addr = pci->pp.msg_res->start;
> + atu.parent_bus_addr = pci->pp.msg_res->start - pci->parent_bus_offset;
>
> ret = dw_pcie_prog_outbound_atu(pci, &atu);
> if (ret)
> diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
> index 985264c88b92..d9d2090f380c 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.c
> +++ b/drivers/pci/controller/dwc/pcie-designware.c
> @@ -475,9 +475,6 @@ int dw_pcie_prog_outbound_atu(struct dw_pcie *pci,
> u32 retries, val;
> u64 limit_addr;
>
> - if (pci->ops && pci->ops->cpu_addr_fixup)
> - parent_bus_addr = pci->ops->cpu_addr_fixup(pci, parent_bus_addr);
> -
> limit_addr = parent_bus_addr + atu->size - 1;
>
> if ((limit_addr & ~pci->region_limit) != (parent_bus_addr & ~pci->region_limit) ||
> --
> 2.34.1
>
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