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Message-Id: <D8IMEB2UP6KS.2GOJ4M6INKKN8@bootlin.com>
Date: Mon, 17 Mar 2025 15:44:42 +0100
From: "Mathieu Dubois-Briand" <mathieu.dubois-briand@...tlin.com>
To: "Andy Shevchenko" <andy.shevchenko@...il.com>
Cc: "Andy Shevchenko" <andriy.shevchenko@...el.com>, "Lee Jones"
 <lee@...nel.org>, "Rob Herring" <robh@...nel.org>, "Krzysztof Kozlowski"
 <krzk+dt@...nel.org>, "Conor Dooley" <conor+dt@...nel.org>, "Kamel Bouhara"
 <kamel.bouhara@...tlin.com>, "Linus Walleij" <linus.walleij@...aro.org>,
 "Bartosz Golaszewski" <brgl@...ev.pl>, "Dmitry Torokhov"
 <dmitry.torokhov@...il.com>, Uwe Kleine-König
 <ukleinek@...nel.org>, "Michael Walle" <mwalle@...nel.org>, "Mark Brown"
 <broonie@...nel.org>, "Greg Kroah-Hartman" <gregkh@...uxfoundation.org>,
 "Rafael J. Wysocki" <rafael@...nel.org>, "Danilo Krummrich"
 <dakr@...nel.org>, <devicetree@...r.kernel.org>,
 <linux-kernel@...r.kernel.org>, <linux-gpio@...r.kernel.org>,
 <linux-input@...r.kernel.org>, <linux-pwm@...r.kernel.org>,
 Grégory Clement <gregory.clement@...tlin.com>, "Thomas
 Petazzoni" <thomas.petazzoni@...tlin.com>
Subject: Re: [PATCH v4 07/10] gpio: max7360: Add MAX7360 gpio support

On Fri Mar 14, 2025 at 9:02 AM CET, Andy Shevchenko wrote:
> Thu, Mar 13, 2025 at 05:43:00PM +0100, Mathieu Dubois-Briand kirjoitti:
> > On Mon Feb 17, 2025 at 9:08 PM CET, Andy Shevchenko wrote:
> > > On Mon, Feb 17, 2025 at 12:20:13PM +0100, Mathieu Dubois-Briand wrote:
>
> ...
>
> > > But what I have read above sounds to me like the following:
> > >
> > > 1) the PORT0-PORT7 should be just a regular pin control with the respective
> > > function being provided (see pinctrl-cy8c95x0.c as an example);
> > 
> > Ok, so I created a pin control driver for the PORT pins. This will
> > effectively help to prevent concurrent use of pins in place of the
> > request()/free() callbacks.
> > 
> > My only concern is: as there is no real pin muxing on the chip, my
> > .set_mux callabck in pinmux_ops structure is not doing anything. It
> > looks like I'm not the only one
> > (drivers/pinctrl/pinctrl-microchip-sgpio.c does the same thing), but I
> > hope this is OK.
>
> Hmm... This is strange. The PWM/GPIO block has 3 functions (GPIO/PWM/rotary),
> How comes you have no switch between them?
>
> As far as I read in the datasheet this is controlled by register 0x40
> (and seems implicitly by other registers when it's in PWM mode).
>

Yes, on pins 6 and 7, we do switch between rotary encoder and other
modes by writing in the register at 0x40, but that's all. My point was
more about all other modes. There is no difference between PWM and GPIO,
at least in output mode: GPIO level is just a PWM with duty cycle either
to 0% or 100%.


-- 
Mathieu Dubois-Briand, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com


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