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Message-ID: <b7969702-5e88-4891-bd0e-8728562ff5f5@ghiti.fr>
Date: Mon, 17 Mar 2025 17:47:20 +0100
From: Alexandre Ghiti <alex@...ti.fr>
To: Xu Lu <luxu.kernel@...edance.com>, akpm@...ux-foundation.org,
jhubbard@...dia.com, kirill.shutemov@...ux.intel.com, tjeznach@...osinc.com,
joro@...tes.org, will@...nel.org, robin.murphy@....com
Cc: lihangjing@...edance.com, xieyongji@...edance.com,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 0/4] riscv: iommu: Support Svnapot
Hi Xu,
You did not +cc linux-mm on your series, it would be nice to have
feedback from them. I'd say it would be easier to resend the whole
patchset with them in +cc.
Thanks,
Alex
On 11/03/2025 13:25, Xu Lu wrote:
> According to the RISC-V IOMMU hardware spec, the IOMMU implementation
> has the same translation process as MMU and supports Svnapot standard
> extension as well. These patches add support for Svnapot in the IOMMU
> driver to make 64K also an available page size during DMA mapping.
>
> Changes in V2:
> 1. Supply more details about huge pte issue in follow_page_pte().
> 2. Fix some style problems.
>
> Xu Lu (4):
> mm/gup: Add huge pte handling logic in follow_page_pte()
> iommu/riscv: Use pte_t to represent page table entry
> iommu/riscv: Introduce IOMMU page table lock
> iommu/riscv: Add support for Svnapot
>
> arch/riscv/include/asm/pgtable.h | 6 +
> drivers/iommu/riscv/iommu.c | 258 +++++++++++++++++++++++++------
> include/linux/pgtable.h | 8 +
> mm/gup.c | 17 +-
> 4 files changed, 233 insertions(+), 56 deletions(-)
>
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