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Message-ID: <dacaa712-08a8-4fd6-ad47-2226040f02aa@t-8ch.de>
Date: Mon, 17 Mar 2025 18:52:57 +0100
From: Thomas Weißschuh <linux@...ssschuh.net>
To: Willy Tarreau <w@....eu>
Cc: Shuah Khan <shuah@...nel.org>, "David S. Miller" <davem@...emloft.net>, 
	Andreas Larsson <andreas@...sler.com>, linux-kernel@...r.kernel.org, linux-kselftest@...r.kernel.org, 
	sparclinux@...r.kernel.org
Subject: Re: [PATCH] tools/nolibc: Add support for SPARC

On 2025-03-17 08:37:46+0100, Willy Tarreau wrote:
> On Sun, Mar 16, 2025 at 02:55:02PM +0100, Thomas Weißschuh wrote:
> > Add support for 32bit and 64bit SPARC to nolibc.
> 
> Oh nice!
> 
> > Signed-off-by: Thomas Weißschuh <linux@...ssschuh.net>
> > ---
> > This is only tested on QEMU.
> > Any tests on real hardware would be very welcome.
> 
> I still have a working U60 here, but under solaris. Such machines are
> not trivial to boot on alternate OSes (and when you find a working
> image usually it's based on an old kernel).

An old kernel should be perfectly fine, no?

> But I've run it under
> Linux 20 years ago, so I know it was supported. I may give it a try
> when I find a moment, but let's not wait for this!

Thanks!

> A few comments below:
> 
> > diff --git a/tools/include/nolibc/arch-sparc.h b/tools/include/nolibc/arch-sparc.h
> > new file mode 100644
> > index 0000000000000000000000000000000000000000..cb5543eca87bb4d52cfba4c0668e35cbbf6dd124
> > --- /dev/null
> > +++ b/tools/include/nolibc/arch-sparc.h
> > @@ -0,0 +1,191 @@
> > +/* SPDX-License-Identifier: LGPL-2.1 OR MIT */
> > +/*
> > + * SPARC (32bit and 64bit) specific definitions for NOLIBC
> > + * Copyright (C) 2025 Thomas Weißschuh <linux@...ssschuh.net>
> > + */
> > +
> > +#ifndef _NOLIBC_ARCH_SPARC_H
> > +#define _NOLIBC_ARCH_SPARC_H
> > +
> > +#include <linux/unistd.h>
> > +
> > +#include "compiler.h"
> > +#include "crt.h"
> > +
> > +/*
> > + * Syscalls for SPARC:
> > + *   - registers are native word size
> > + *   - syscall number is passed in g1
> > + *   - arguments are in o0-o5
> > + *   - the system call is performed by calling a trap instruction
> > + *   - syscall return value is in 0a
>                                      ^^
> What is "0a" here ? I suspect a typo and you meant "o0".

Correct, will fix.

> > +/* startup code */
> > +void __attribute__((weak, noreturn)) __nolibc_entrypoint __no_stack_protector _start(void)
> > +{
> > +	__asm__ volatile (
> > +		/*
> > +		 * Save stack pointer to o0, as arg1 of _start_c.
> > +		 * Account for window save area and stack bias.
> > +		 */
> > +#ifdef __arch64__
> > +		"add %sp, 128 + 2047, %o0\n"
> 
> It's really unclear where this magical 2047 comes from, I think it must
> be explained in the comment above so that someone disagreeing with it
> later can figure whether it's right or wrong.

128 is the context window and 2047 is the stack bias.
I'll try to make it clearer.

> 
> > +#else
> > +		"add %sp, 64, %o0\n"
> > +#endif
> 
> Also, I could be wrong, but from my old memories of playing with the
> stack on SPARC long ago, I seem to remember that the stack is growing
> down. Thus I find these "add" suspicious or at least confusing. You
> mention "window save area and stack bias" above, I'm not sure what it
> refers to, but if we can safely erase parts of the stack because too
> much was preserved, maybe some more explanation about the initial and
> target layouts is deserved here.

There is a graphic in the psABI [0] under "Process Stack and Registers".
I'll write something based on that.

> > +		"b,a _start_c\n"     /* transfer to c runtime */
> 
> OK great, the delayed slot is covered! (that type of thing can work
> by pure luck in one test and fail in another one depending on what
> bytes follow the jump).

Yeah, it brings memories to the work on MIPS support.

> Thanks!
> 
> Acked-by: Willy Tarreau <w@....eu>

Thanks!

[0] https://uclibc.org/docs/psABI-sparc.pdf

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