linux-kernel - Re: [PATCH net-next v2 2/2] r8169: disable RTL8126 ZRX-DC timeout

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Message-ID: <9cc1ed25-1244-4f4d-8e5e-fe5113a07fbe@gmail.com>
Date: Mon, 17 Mar 2025 22:01:14 +0100
From: Heiner Kallweit <hkallweit1@...il.com>
To: ChunHao Lin <hau@...ltek.com>, nic_swsd@...ltek.com,
 andrew+netdev@...n.ch, davem@...emloft.net, edumazet@...gle.com,
 kuba@...nel.org, pabeni@...hat.com
Cc: netdev@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH net-next v2 2/2] r8169: disable RTL8126 ZRX-DC timeout

On 17.03.2025 09:42, ChunHao Lin wrote:
> Disable it due to it dose not meet ZRX-DC specification. If it is enabled,
> device will exit L1 substate every 100ms. Disable it for saving more power
> in L1 substate.
> 
> Signed-off-by: ChunHao Lin <hau@...ltek.com>
> ---
>  drivers/net/ethernet/realtek/r8169_main.c | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c
> index 3c663fca07d3..ad3603cf7595 100644
> --- a/drivers/net/ethernet/realtek/r8169_main.c
> +++ b/drivers/net/ethernet/realtek/r8169_main.c
> @@ -2852,6 +2852,25 @@ static u32 rtl_csi_read(struct rtl8169_private *tp, int addr)
>  		RTL_R32(tp, CSIDR) : ~0;
>  }
>  
> +static void rtl_disable_zrxdc_timeout(struct rtl8169_private *tp)
> +{
> +	struct pci_dev *pdev = tp->pci_dev;
> +	u32 csi;
> +	u8 val;
> +
> +#define RTL_GEN3_RELATED_OFF	0x0890
> +#define RTL_GEN3_ZRXDC_NONCOMPL	0x1
> +	if (pdev->cfg_size > RTL_GEN3_RELATED_OFF &&
> +	    pci_read_config_byte(pdev, RTL_GEN3_RELATED_OFF, &val) == PCIBIOS_SUCCESSFUL &&
> +	    pci_write_config_byte(pdev, RTL_GEN3_RELATED_OFF, val & ~RTL_GEN3_ZRXDC_NONCOMPL) == PCIBIOS_SUCCESSFUL)

These two lines are too long. Netdev allows only 80 chars.
checkpatch.pl would have noticed you.

Apart from that, looks good to me.

> +		return;
> +
> +	netdev_notice_once(tp->dev,
> +		"No native access to PCI extended config space, falling back to CSI\n");
> +	csi = rtl_csi_read(tp, RTL_GEN3_RELATED_OFF);
> +	rtl_csi_write(tp, RTL_GEN3_RELATED_OFF, csi & ~RTL_GEN3_ZRXDC_NONCOMPL);

For my understanding: The csi functions always deal with 32bit values.
Does this mean that all Realtek-specific registers in extended config
space are 32bit registers?

> +}
> +
>  static void rtl_set_aspm_entry_latency(struct rtl8169_private *tp, u8 val)
>  {
>  	struct pci_dev *pdev = tp->pci_dev;
> @@ -3824,6 +3843,7 @@ static void rtl_hw_start_8125d(struct rtl8169_private *tp)
>  
>  static void rtl_hw_start_8126a(struct rtl8169_private *tp)
>  {
> +	rtl_disable_zrxdc_timeout(tp);
>  	rtl_set_def_aspm_entry_latency(tp);
>  	rtl_hw_start_8125_common(tp);
>  }