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Message-ID: <20250317100029.881286-2-quic_varada@quicinc.com>
Date: Mon, 17 Mar 2025 15:30:26 +0530
From: Varadarajan Narayanan <quic_varada@...cinc.com>
To: <bhelgaas@...gle.com>, <lpieralisi@...nel.org>, <kw@...ux.com>,
<manivannan.sadhasivam@...aro.org>, <robh@...nel.org>,
<krzk+dt@...nel.org>, <conor+dt@...nel.org>, <andersson@...nel.org>,
<konradybcio@...nel.org>, <linux-arm-msm@...r.kernel.org>,
<linux-pci@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>
CC: Varadarajan Narayanan <quic_varada@...cinc.com>
Subject: [PATCH v14 1/4] dt-bindings: PCI: qcom: Add MHI registers for IPQ9574
The MHI range is present in ipq5332, ipq6018, ipq8074 and ipq9574.
Append the MHI register range and complete the hardware description
for the above SoCs.
Signed-off-by: Varadarajan Narayanan <quic_varada@...cinc.com>
---
v14: Update commit log
v13: Fix 'minItems' for reg-names.
Update commit log
Remove 'Fixes'
v12: New patch introduced in this patchset. MHI range was missed in the
initial post
---
Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
index 8f628939209e..469b99fa0f0e 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
@@ -175,14 +175,16 @@ allOf:
properties:
reg:
minItems: 5
- maxItems: 5
+ maxItems: 6
reg-names:
+ minItems: 5
items:
- const: dbi # DesignWare PCIe registers
- const: elbi # External local bus interface registers
- const: atu # ATU address space
- const: parf # Qualcomm specific registers
- const: config # PCIe configuration space
+ - const: mhi # MHI registers
- if:
properties:
--
2.34.1
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