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Message-ID: <3c14597f-e5dd-4e43-bd4a-6f7a6d08afa7@amd.com>
Date: Mon, 17 Mar 2025 16:53:33 +0530
From: Dheeraj Kumar Srivastava <dheerajkumar.srivastava@....com>
To: Vasant Hegde <vasant.hegde@....com>, joro@...tes.org,
suravee.suthikulpanit@....com, will@...nel.org, robin.murphy@....com,
linux-kernel@...r.kernel.org, iommu@...ts.linux.dev
Subject: Re: [PATCH v3 3/8] iommu/amd: Add debugfs support to dump IOMMU
Capability registers
Hi Vasant,
On 3/13/2025 4:02 PM, Vasant Hegde wrote:
> Dheeraj,
>
>
> On 2/6/2025 11:29 AM, Dheeraj Kumar Srivastava wrote:
>> IOMMU Capability registers defines capabilities of IOMMU and information
>> needed for initialising MMIO registers and device table. This is useful
>> to dump these registers for debugging IOMMU related issues.
>>
>> e.g.To get capability registers value for iommu<x>
>> # echo "0x10" > /sys/kernel/debug/iommu/amd/iommu00/capability
>> # cat /sys/kernel/debug/iommu/amd/iommu00/capability
>>
>> Signed-off-by: Dheeraj Kumar Srivastava <dheerajkumar.srivastava@....com>
>> ---
>> drivers/iommu/amd/debugfs.c | 47 +++++++++++++++++++++++++++++++++++++
>> 1 file changed, 47 insertions(+)
>>
>> diff --git a/drivers/iommu/amd/debugfs.c b/drivers/iommu/amd/debugfs.c
>> index b16b62ae7111..dc5fdc905754 100644
>> --- a/drivers/iommu/amd/debugfs.c
>> +++ b/drivers/iommu/amd/debugfs.c
>> @@ -18,6 +18,7 @@ static struct dentry *amd_iommu_debugfs;
>> #define OFS_IN_SZ 8
>>
>> static int mmio_offset = -1;
>> +static int cap_offset = -1;
>>
>> static ssize_t iommu_mmio_write(struct file *filp, const char __user *ubuf,
>> size_t cnt, loff_t *ppos)
>> @@ -58,6 +59,50 @@ static int iommu_mmio_show(struct seq_file *m, void *unused)
>> }
>> DEFINE_SHOW_STORE_ATTRIBUTE(iommu_mmio);
>>
>> +static ssize_t iommu_capability_write(struct file *filp, const char __user *ubuf,
>> + size_t cnt, loff_t *ppos)
>> +{
>> + int ret;
>> +
>> + if (cnt > OFS_IN_SZ)
>> + return -EINVAL;
>> +
>> + ret = kstrtou32_from_user(ubuf, cnt, 0, &cap_offset);
>> + if (ret)
>> + return ret;
>> +
>> + /* Capability register at offset 0x14 is the last IOMMU capability register. */
>> + if (cap_offset > 0x14) {
>> + cap_offset = -1;
>> + return -EINVAL;
>> + }
>> +
>> + return cnt;
>> +}
>> +
>> +static int iommu_capability_show(struct seq_file *m, void *unused)
>> +{
>> + struct amd_iommu *iommu = m->private;
>> + u32 value;
>> + int err;
>> +
>> + if (cap_offset < 0) {
>> + seq_puts(m, "Please provide capability register's offset\n");
>
> May be you can add last offset details... so that it becomes easy to find out
> the offset range.
Sure.
Thanks
Dheeraj
>
> -Vasant
>
>
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