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Message-Id: <D8IJ5TEHREW1.2FK88ACT1JPYQ@fairphone.com>
Date: Mon, 17 Mar 2025 13:12:33 +0100
From: "Luca Weiss" <luca.weiss@...rphone.com>
To: "Konrad Dybcio" <konrad.dybcio@....qualcomm.com>, "Bjorn Andersson"
 <andersson@...nel.org>, "Konrad Dybcio" <konradybcio@...nel.org>, "Rob
 Herring" <robh@...nel.org>, "Krzysztof Kozlowski" <krzk+dt@...nel.org>,
 "Conor Dooley" <conor+dt@...nel.org>
Cc: <~postmarketos/upstreaming@...ts.sr.ht>, <phone-devel@...r.kernel.org>,
 "Krzysztof Kozlowski" <krzk@...nel.org>, <linux-arm-msm@...r.kernel.org>,
 <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/3] arm64: dts: qcom: sm6350: Add OPP table support to
 UFSHC

Hi Konrad,

On Fri Mar 14, 2025 at 11:08 PM CET, Konrad Dybcio wrote:
> On 3/14/25 10:17 AM, Luca Weiss wrote:
>> UFS host controller, when scaling gears, should choose appropriate
>> performance state of RPMh power domain controller along with clock
>> frequency. So let's add the OPP table support to specify both clock
>> frequency and RPMh performance states replacing the old "freq-table-hz"
>> property.
>> 
>> Signed-off-by: Luca Weiss <luca.weiss@...rphone.com>
>> ---
>
> [...]
>
>> +
>> +			ufs_opp_table: opp-table {
>> +				compatible = "operating-points-v2";
>> +
>> +				opp-50000000 {
>> +					opp-hz = /bits/ 64 <50000000>,
>> +						 /bits/ 64 <0>,
>> +						 /bits/ 64 <0>,
>> +						 /bits/ 64 <37500000>,
>
> This rate on this clk requires opp_svs (not low_svs)

Not sure where you're seeing this?

This is from my msm-4.19 tree:

gcc_ufs_phy_axi_clk_src:
    .rate_max = (unsigned long[VDD_NUM]) { [VDD_LOWER] = 50000000,
gcc_ufs_phy_unipro_core_clk_src:
    .rate_max = (unsigned long[VDD_NUM]) { [VDD_LOWER] = 37500000,
gcc_ufs_phy_ice_core_clk_src:
    .rate_max = (unsigned long[VDD_NUM]) { [VDD_LOWER] = 75000000,

[VDD_LOWER] = RPMH_REGULATOR_LEVEL_LOW_SVS,

My intepretation for this is we need low_svs?

Regards
Luca

>
> with that:
>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
>
> Konrad


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