linux-kernel - [tip: x86/cpu] x86/mtrr: Modify a x86

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Message-ID: <174232407313.14745.14361930258700243323.tip-bot2@tip-bot2>
Date: Tue, 18 Mar 2025 18:54:33 -0000
From: "tip-bot2 for Sohil Mehta" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Sohil Mehta <sohil.mehta@...el.com>, Ingo Molnar <mingo@...nel.org>,
 Dave Hansen <dave.hansen@...ux.intel.com>, x86@...nel.org,
 linux-kernel@...r.kernel.org
Subject:
 [tip: x86/cpu] x86/mtrr: Modify a x86_model check to an Intel VFM check

The following commit has been merged into the x86/cpu branch of tip:

Commit-ID:     23c905f7ec9d8dc3016fa4e3a9f321a920583b60
Gitweb:        https://git.kernel.org/tip/23c905f7ec9d8dc3016fa4e3a9f321a920583b60
Author:        Sohil Mehta <sohil.mehta@...el.com>
AuthorDate:    Wed, 19 Feb 2025 18:41:22 
Committer:     Ingo Molnar <mingo@...nel.org>
CommitterDate: Tue, 18 Mar 2025 19:33:45 +01:00

x86/mtrr: Modify a x86_model check to an Intel VFM check

Simplify one of the last few Intel x86_model checks in arch/x86 by
substituting it with a VFM one.

Signed-off-by: Sohil Mehta <sohil.mehta@...el.com>
Signed-off-by: Ingo Molnar <mingo@...nel.org>
Acked-by: Dave Hansen <dave.hansen@...ux.intel.com>
Link: https://lore.kernel.org/r/20250219184133.816753-5-sohil.mehta@intel.com
---
 arch/x86/kernel/cpu/mtrr/generic.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kernel/cpu/mtrr/generic.c b/arch/x86/kernel/cpu/mtrr/generic.c
index 6be3cad..e2c6b47 100644
--- a/arch/x86/kernel/cpu/mtrr/generic.c
+++ b/arch/x86/kernel/cpu/mtrr/generic.c
@@ -13,6 +13,7 @@
 #include <asm/processor-flags.h>
 #include <asm/cacheinfo.h>
 #include <asm/cpufeature.h>
+#include <asm/cpu_device_id.h>
 #include <asm/hypervisor.h>
 #include <asm/mshyperv.h>
 #include <asm/tlbflush.h>
@@ -1026,8 +1027,7 @@ int generic_validate_add_page(unsigned long base, unsigned long size,
 	 * For Intel PPro stepping <= 7
 	 * must be 4 MiB aligned and not touch 0x70000000 -> 0x7003FFFF
 	 */
-	if (mtrr_if == &generic_mtrr_ops && boot_cpu_data.x86 == 6 &&
-	    boot_cpu_data.x86_model == 1 &&
+	if (mtrr_if == &generic_mtrr_ops && boot_cpu_data.x86_vfm == INTEL_PENTIUM_PRO &&
 	    boot_cpu_data.x86_stepping <= 7) {
 		if (base & ((1 << (22 - PAGE_SHIFT)) - 1)) {
 			pr_warn("mtrr: base(0x%lx000) is not 4 MiB aligned\n", base);