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Message-Id: <20250318-dwc3-refactor-v5-7-90ea6e5b3ba4@oss.qualcomm.com>
Date: Tue, 18 Mar 2025 14:05:07 -0500
From: Bjorn Andersson <bjorn.andersson@....qualcomm.com>
To: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Felipe Balbi <balbi@...nel.org>,
Wesley Cheng <quic_wcheng@...cinc.com>,
Saravana Kannan <saravanak@...gle.com>,
Thinh Nguyen <Thinh.Nguyen@...opsys.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Frank Li <Frank.li@....com>
Cc: linux-arm-msm@...r.kernel.org, linux-usb@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
Bjorn Andersson <bjorn.andersson@....qualcomm.com>
Subject: [PATCH v5 7/7] arm64: dts: qcom: sc8280x: Flatten the USB nodes
Transition the three USB controllers found in sc8280xp to the newly
introduced, flattened representation of the Qualcomm USB block, i.e.
qcom,snps-dwc3, to show the end result.
The reg and interrupts properties from the usb child node are merged
with their counterpart in the outer node, remaining properties and child
nodes are simply moved.
Reviewed-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@....qualcomm.com>
---
arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 12 +-
arch/arm64/boot/dts/qcom/sa8540p-ride.dts | 5 +-
arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 12 +-
.../boot/dts/qcom/sc8280xp-huawei-gaokun3.dts | 10 +-
.../dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 11 +-
.../boot/dts/qcom/sc8280xp-microsoft-arcata.dts | 10 +-
.../boot/dts/qcom/sc8280xp-microsoft-blackrock.dts | 18 +--
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 157 ++++++++++-----------
8 files changed, 95 insertions(+), 140 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
index 2fd1dafe63ce7a4f409d19946b9f10ffe324fba3..3d84cbf5af3181c51853ed3a05f1fd9dd47d113b 100644
--- a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
+++ b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts
@@ -631,12 +631,10 @@ &ufs_card_phy {
};
&usb_0 {
- status = "okay";
-};
-
-&usb_0_dwc3 {
/* TODO: Define USB-C connector properly */
dr_mode = "peripheral";
+
+ status = "okay";
};
&usb_0_hsphy {
@@ -655,12 +653,10 @@ &usb_0_qmpphy {
};
&usb_1 {
- status = "okay";
-};
-
-&usb_1_dwc3 {
/* TODO: Define USB-C connector properly */
dr_mode = "host";
+
+ status = "okay";
};
&usb_1_hsphy {
diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
index 11663cf81e45881d74aa58104b8e36b1189cede0..e794f45ce841f0bb041ee3732d561b2ec49eeb35 100644
--- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
+++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
@@ -464,11 +464,8 @@ &ufs_mem_phy {
};
&usb_0 {
- status = "okay";
-};
-
-&usb_0_dwc3 {
dr_mode = "peripheral";
+ status = "okay";
};
&usb_0_hsphy {
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
index c4a5828be9353de0e4215b71a78ed5ca8e4b6b8a..46d11e8261e21cca99e7c01aaacc62182a97ef56 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
@@ -809,11 +809,9 @@ &ufs_mem_phy {
};
&usb_0 {
- status = "okay";
-};
-
-&usb_0_dwc3 {
dr_mode = "host";
+
+ status = "okay";
};
&usb_0_dwc3_hs {
@@ -846,11 +844,9 @@ &usb_0_qmpphy_out {
};
&usb_1 {
- status = "okay";
-};
-
-&usb_1_dwc3 {
dr_mode = "host";
+
+ status = "okay";
};
&usb_1_dwc3_hs {
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-huawei-gaokun3.dts b/arch/arm64/boot/dts/qcom/sc8280xp-huawei-gaokun3.dts
index 1667c7157057825e92c6103c9d8fe03dbf1d2b4c..10fcf85c0d94a42de7181f7982732e428fbcb7c9 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-huawei-gaokun3.dts
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-huawei-gaokun3.dts
@@ -1123,11 +1123,8 @@ bluetooth {
};
&usb_0 {
- status = "okay";
-};
-
-&usb_0_dwc3 {
dr_mode = "host";
+ status = "okay";
};
&usb_0_dwc3_hs {
@@ -1160,11 +1157,8 @@ &usb_0_qmpphy_out {
};
&usb_1 {
- status = "okay";
-};
-
-&usb_1_dwc3 {
dr_mode = "host";
+ status = "okay";
};
&usb_1_dwc3_hs {
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
index d36fc1ebe50e8baf73e21bd571f716e0152aa624..20c3b2f7231a1df14fe83ef548ebe48e9437b7f9 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
@@ -1329,11 +1329,9 @@ bluetooth {
};
&usb_0 {
- status = "okay";
-};
-
-&usb_0_dwc3 {
dr_mode = "host";
+
+ status = "okay";
};
&usb_0_dwc3_hs {
@@ -1366,11 +1364,8 @@ &usb_0_qmpphy_out {
};
&usb_1 {
- status = "okay";
-};
-
-&usb_1_dwc3 {
dr_mode = "host";
+ status = "okay";
};
&usb_1_dwc3_hs {
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts
index d00889fa6f0bac01d326dca9801c66a508ff1d67..105463070e314a2e8ce8e255a013f56f09c4b425 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-arcata.dts
@@ -749,11 +749,8 @@ embedded-controller {
};
&usb_0 {
- status = "okay";
-};
-
-&usb_0_dwc3 {
dr_mode = "host";
+ status = "okay";
};
&usb_0_dwc3_hs {
@@ -786,11 +783,8 @@ &usb_0_qmpphy_out {
};
&usb_1 {
- status = "okay";
-};
-
-&usb_1_dwc3 {
dr_mode = "host";
+ status = "okay";
};
&usb_1_dwc3_hs {
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts
index 812251324002b50f3b48845b6c244f692d42b9b2..cb5baf50cef216ab2fb19fad3c58c999a68237fe 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-microsoft-blackrock.dts
@@ -982,11 +982,9 @@ bluetooth {
};
&usb_0 {
- status = "okay";
-};
-
-&usb_0_dwc3 {
dr_mode = "host";
+
+ status = "okay";
};
&usb_0_dwc3_hs {
@@ -1019,11 +1017,9 @@ &usb_0_qmpphy_out {
};
&usb_1 {
- status = "okay";
-};
-
-&usb_1_dwc3 {
dr_mode = "host";
+
+ status = "okay";
};
&usb_1_dwc3_hs {
@@ -1059,12 +1055,10 @@ &usb_2 {
pinctrl-0 = <&usb2_en_state>;
pinctrl-names = "default";
- status = "okay";
-};
-
-&usb_2_dwc3 {
phys = <&usb_2_hsphy0>, <&usb_2_qmpphy0>;
phy-names = "usb2-0", "usb3-0";
+
+ status = "okay";
};
&usb_2_hsphy0 {
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index f57c23c244b6bb8a5502493553bbd17372e57b0c..cfc61d2a0285da15ddf28db50a14d088adc684d7 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -3457,12 +3457,9 @@ system-cache-controller@...0000 {
interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
};
- usb_2: usb@...8800 {
- compatible = "qcom,sc8280xp-dwc3-mp", "qcom,dwc3";
- reg = <0 0x0a4f8800 0 0x400>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ usb_2: usb@...0000 {
+ compatible = "qcom,sc8280xp-dwc3-mp", "qcom,snps-dwc3";
+ reg = <0 0x0a400000 0 0x10000>;
clocks = <&gcc GCC_CFG_NOC_USB3_MP_AXI_CLK>,
<&gcc GCC_USB30_MP_MASTER_CLK>,
@@ -3480,7 +3477,8 @@ usb_2: usb@...8800 {
<&gcc GCC_USB30_MP_MASTER_CLK>;
assigned-clock-rates = <19200000>, <200000000>;
- interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts-extended = <&intc GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
+ <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 857 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH>,
@@ -3499,7 +3497,8 @@ usb_2: usb@...8800 {
<&pdc 16 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 17 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "pwr_event_1", "pwr_event_2",
+ interrupt-names = "dwc_usb3",
+ "pwr_event_1", "pwr_event_2",
"pwr_event_3", "pwr_event_4",
"hs_phy_1", "hs_phy_2",
"hs_phy_3", "hs_phy_4",
@@ -3509,6 +3508,7 @@ usb_2: usb@...8800 {
"dp_hs_phy_4", "dm_hs_phy_4",
"ss_phy_1", "ss_phy_2";
+ iommus = <&apps_smmu 0x800 0x0>;
power-domains = <&gcc USB30_MP_GDSC>;
required-opps = <&rpmhpd_opp_nom>;
@@ -3518,35 +3518,28 @@ usb_2: usb@...8800 {
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_MP 0>;
interconnect-names = "usb-ddr", "apps-usb";
+ phys = <&usb_2_hsphy0>, <&usb_2_qmpphy0>,
+ <&usb_2_hsphy1>, <&usb_2_qmpphy1>,
+ <&usb_2_hsphy2>,
+ <&usb_2_hsphy3>;
+ phy-names = "usb2-0", "usb3-0",
+ "usb2-1", "usb3-1",
+ "usb2-2",
+ "usb2-3";
+
wakeup-source;
+ dr_mode = "host";
+
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
+
status = "disabled";
+ };
- usb_2_dwc3: usb@...0000 {
- compatible = "snps,dwc3";
- reg = <0 0x0a400000 0 0xcd00>;
- interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
- iommus = <&apps_smmu 0x800 0x0>;
- phys = <&usb_2_hsphy0>, <&usb_2_qmpphy0>,
- <&usb_2_hsphy1>, <&usb_2_qmpphy1>,
- <&usb_2_hsphy2>,
- <&usb_2_hsphy3>;
- phy-names = "usb2-0", "usb3-0",
- "usb2-1", "usb3-1",
- "usb2-2",
- "usb2-3";
- dr_mode = "host";
- snps,dis-u1-entry-quirk;
- snps,dis-u2-entry-quirk;
- };
- };
-
- usb_0: usb@...8800 {
- compatible = "qcom,sc8280xp-dwc3", "qcom,dwc3";
- reg = <0 0x0a6f8800 0 0x400>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
+ usb_0: usb@...0000 {
+ compatible = "qcom,sc8280xp-dwc3", "qcom,snps-dwc3";
+ reg = <0 0x0a600000 0 0x10000>;
clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
<&gcc GCC_USB30_PRIM_MASTER_CLK>,
@@ -3564,17 +3557,20 @@ usb_0: usb@...8800 {
<&gcc GCC_USB30_PRIM_MASTER_CLK>;
assigned-clock-rates = <19200000>, <200000000>;
- interrupts-extended = <&intc GIC_SPI 804 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts-extended = <&intc GIC_SPI 803 IRQ_TYPE_LEVEL_HIGH>,
+ <&intc GIC_SPI 804 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 805 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 14 IRQ_TYPE_EDGE_BOTH>,
<&pdc 15 IRQ_TYPE_EDGE_BOTH>,
<&pdc 138 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "pwr_event",
+ interrupt-names = "dwc_usb3",
+ "pwr_event",
"hs_phy_irq",
"dp_hs_phy_irq",
"dm_hs_phy_irq",
"ss_phy_irq";
+ iommus = <&apps_smmu 0x820 0x0>;
power-domains = <&gcc USB30_PRIM_GDSC>;
required-opps = <&rpmhpd_opp_nom>;
@@ -3584,45 +3580,40 @@ usb_0: usb@...8800 {
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_0 0>;
interconnect-names = "usb-ddr", "apps-usb";
+ phys = <&usb_0_hsphy>, <&usb_0_qmpphy QMP_USB43DP_USB3_PHY>;
+ phy-names = "usb2-phy", "usb3-phy";
+
wakeup-source;
- status = "disabled";
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
- usb_0_dwc3: usb@...0000 {
- compatible = "snps,dwc3";
- reg = <0 0x0a600000 0 0xcd00>;
- interrupts = <GIC_SPI 803 IRQ_TYPE_LEVEL_HIGH>;
- iommus = <&apps_smmu 0x820 0x0>;
- phys = <&usb_0_hsphy>, <&usb_0_qmpphy QMP_USB43DP_USB3_PHY>;
- phy-names = "usb2-phy", "usb3-phy";
- snps,dis-u1-entry-quirk;
- snps,dis-u2-entry-quirk;
+ status = "disabled";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
- port@0 {
- reg = <0>;
+ port@0 {
+ reg = <0>;
- usb_0_dwc3_hs: endpoint {
- };
+ usb_0_dwc3_hs: endpoint {
};
+ };
- port@1 {
- reg = <1>;
+ port@1 {
+ reg = <1>;
- usb_0_dwc3_ss: endpoint {
- remote-endpoint = <&usb_0_qmpphy_usb_ss_in>;
- };
+ usb_0_dwc3_ss: endpoint {
+ remote-endpoint = <&usb_0_qmpphy_usb_ss_in>;
};
};
};
};
- usb_1: usb@...8800 {
- compatible = "qcom,sc8280xp-dwc3", "qcom,dwc3";
- reg = <0 0x0a8f8800 0 0x400>;
+ usb_1: usb@...0000 {
+ compatible = "qcom,sc8280xp-dwc3", "qcom,snps-dwc3";
+ reg = <0 0x0a800000 0 0x10000>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
@@ -3643,17 +3634,20 @@ usb_1: usb@...8800 {
<&gcc GCC_USB30_SEC_MASTER_CLK>;
assigned-clock-rates = <19200000>, <200000000>;
- interrupts-extended = <&intc GIC_SPI 811 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts-extended = <&intc GIC_SPI 810 IRQ_TYPE_LEVEL_HIGH>,
+ <&intc GIC_SPI 811 IRQ_TYPE_LEVEL_HIGH>,
<&intc GIC_SPI 790 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 12 IRQ_TYPE_EDGE_BOTH>,
<&pdc 13 IRQ_TYPE_EDGE_BOTH>,
<&pdc 136 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "pwr_event",
+ interrupt-names = "dwc_usb3",
+ "pwr_event",
"hs_phy_irq",
"dp_hs_phy_irq",
"dm_hs_phy_irq",
"ss_phy_irq";
+ iommus = <&apps_smmu 0x860 0x0>;
power-domains = <&gcc USB30_SEC_GDSC>;
required-opps = <&rpmhpd_opp_nom>;
@@ -3663,37 +3657,32 @@ usb_1: usb@...8800 {
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_1 0>;
interconnect-names = "usb-ddr", "apps-usb";
+ phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
+ phy-names = "usb2-phy", "usb3-phy";
+
wakeup-source;
- status = "disabled";
+ snps,dis-u1-entry-quirk;
+ snps,dis-u2-entry-quirk;
- usb_1_dwc3: usb@...0000 {
- compatible = "snps,dwc3";
- reg = <0 0x0a800000 0 0xcd00>;
- interrupts = <GIC_SPI 810 IRQ_TYPE_LEVEL_HIGH>;
- iommus = <&apps_smmu 0x860 0x0>;
- phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
- phy-names = "usb2-phy", "usb3-phy";
- snps,dis-u1-entry-quirk;
- snps,dis-u2-entry-quirk;
+ status = "disabled";
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
- port@0 {
- reg = <0>;
+ port@0 {
+ reg = <0>;
- usb_1_dwc3_hs: endpoint {
- };
+ usb_1_dwc3_hs: endpoint {
};
+ };
- port@1 {
- reg = <1>;
+ port@1 {
+ reg = <1>;
- usb_1_dwc3_ss: endpoint {
- remote-endpoint = <&usb_1_qmpphy_usb_ss_in>;
- };
+ usb_1_dwc3_ss: endpoint {
+ remote-endpoint = <&usb_1_qmpphy_usb_ss_in>;
};
};
};
--
2.48.1
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