linux-kernel - Re: [PATCH v12 4/6] clk: qcom: Add NSS clock Controller driver for IPQ9574

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <ef86ccad056bc03af7f01d5696787766.sboyd@kernel.org>
Date: Tue, 18 Mar 2025 15:50:31 -0700
From: Stephen Boyd <sboyd@...nel.org>
To: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>, Marek Behún <kabel@...nel.org>
Cc: andersson@...nel.org, mturquette@...libre.com, robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org, konradybcio@...nel.org, catalin.marinas@....com, will@...nel.org, p.zabel@...gutronix.de, richardcochran@...il.com, geert+renesas@...der.be, lumag@...nel.org, heiko@...ech.de, biju.das.jz@...renesas.com, quic_tdas@...cinc.com, nfraprado@...labora.com, elinor.montmasson@...oirfairelinux.com, ross.burton@....com, javier.carrasco@...fvision.net, ebiggers@...gle.com, quic_anusha@...cinc.com, linux-arm-msm@...r.kernel.org, linux-clk@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, netdev@...r.kernel.org, quic_varada@...cinc.com, quic_srichara@...cinc.com
Subject: Re: [PATCH v12 4/6] clk: qcom: Add NSS clock Controller driver for IPQ9574

Quoting Marek Behún (2025-03-17 07:08:16)
> On Thu, Mar 13, 2025 at 04:33:57PM +0530, Manikanta Mylavarapu wrote:
> 
> > +static struct clk_rcg2 nss_cc_clc_clk_src = {
> > +     .cmd_rcgr = 0x28604,
> > +     .mnd_width = 0,
> > +     .hid_width = 5,
> > +     .parent_map = nss_cc_parent_map_6,
> > +     .freq_tbl = ftbl_nss_cc_clc_clk_src,
> > +     .clkr.hw.init = &(const struct clk_init_data) {
> > +             .name = "nss_cc_clc_clk_src",
> > +             .parent_data = nss_cc_parent_data_6,
> > +             .num_parents = ARRAY_SIZE(nss_cc_parent_data_6),
> > +             .ops = &clk_rcg2_ops,
> > +     },
> > +};
> 
> This structure definition gets repeated many times in this driver,
> with only slight changes. (This also happens in other qualcomm clock
> drivers.)
> 
> Would it be possible to refactor it into a macro, to avoid the
> insane code repetition?
> 

We have this discussion every couple years or so. The short answer is
no. The long answer is that it makes it harder to read because we don't
know what argument to the macro corresponds to the struct members.

It could probably use the CLK_HW_INIT_PARENTS_DATA macro though.

static struct clk_rcg2 nss_cc_clc_clk_src = {
     .cmd_rcgr = 0x28604,
     .mnd_width = 0,
     .hid_width = 5,
     .parent_map = nss_cc_parent_map_6,
     .freq_tbl = ftbl_nss_cc_clc_clk_src,
     .clkr.hw.init = CLK_HW_INIT_PARENTS_DATA("nss_cc_clc_clk_src",
                                              nss_cc_parent_data_6,
					      &clk_rcg2_ops, 0),
     },
};

but then we lose the const. Oh well.

The whole qcom clk driver probably needs an overhaul to just have
descriptors that populate a bunch of clks that are allocated at probe
time so that the memory footprint is smaller if you have multiple clk
drivers loaded and so that we can probe the driver again without
unloading the whole kernel module.