linux-kernel - Re: [PATCH v5 2/2] phy: qcom: qmp-pcie: Add PHY register retention support

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Message-ID: <4fc69ebf-1bd4-428b-bae9-a4f67edee0f5@quicinc.com>
Date: Tue, 18 Mar 2025 14:56:51 +0800
From: "Wenbin Yao (Consultant)" <quic_wenbyao@...cinc.com>
To: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
CC: <vkoul@...nel.org>, <kishon@...nel.org>, <p.zabel@...gutronix.de>,
        <dmitry.baryshkov@...aro.org>, <abel.vesa@...aro.org>,
        <quic_qianyu@...cinc.com>, <neil.armstrong@...aro.org>,
        <quic_devipriy@...cinc.com>, <konrad.dybcio@....qualcomm.com>,
        <linux-arm-msm@...r.kernel.org>, <linux-phy@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v5 2/2] phy: qcom: qmp-pcie: Add PHY register retention
 support

On 3/14/2025 10:50 PM, Manivannan Sadhasivam wrote:
> On Wed, Feb 26, 2025 at 06:36:00PM +0800, Wenbin Yao wrote:
>> From: Qiang Yu <quic_qianyu@...cinc.com>
>>
>> Some QCOM PCIe PHYs support no_csr reset. Unlike BCR reset which resets the
>> whole PHY (hardware and register), no_csr reset only resets PHY hardware
>> but retains register values, which means PHY setting can be skipped during
>> PHY init if PCIe link is enabled in booltloader and only no_csr is toggled
>> after that.
>>
>> Hence, determine whether the PHY has been enabled in bootloader by
>> verifying QPHY_START_CTRL register. If it's programmed and no_csr reset is
>> available, skip BCR reset and PHY register setting to establish the PCIe
>> link with bootloader - programmed PHY settings.
>>
>> Signed-off-by: Qiang Yu <quic_qianyu@...cinc.com>
>> Signed-off-by: Wenbin Yao <quic_wenbyao@...cinc.com>
> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
>
> One nit below.
>
>> ---
>>   drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 69 ++++++++++++++++++++----
>>   1 file changed, 59 insertions(+), 10 deletions(-)
>>
>> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
>> index 219266125cf2..c3642d1807e4 100644
>> --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
>> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
>> @@ -2805,6 +2805,7 @@ struct qmp_pcie {
>>   
>>   	const struct qmp_phy_cfg *cfg;
>>   	bool tcsr_4ln_config;
>> +	bool skip_init;
>>   
>>   	void __iomem *serdes;
>>   	void __iomem *pcs;
>> @@ -3976,18 +3977,38 @@ static int qmp_pcie_init(struct phy *phy)
>>   {
>>   	struct qmp_pcie *qmp = phy_get_drvdata(phy);
>>   	const struct qmp_phy_cfg *cfg = qmp->cfg;
>> +	void __iomem *pcs = qmp->pcs;
>> +	bool phy_initialized = !!(readl(pcs + cfg->regs[QPHY_START_CTRL]));
>>   	int ret;
>>   
>> +	qmp->skip_init = qmp->nocsr_reset && phy_initialized;
>> +	/*
>> +	 * We need to check the existence of init sequences in two cases:
>> +	 * 1. The PHY doesn't support no_csr reset.
>> +	 * 2. The PHY supports no_csr reset but isn't initialized by bootloader.
>> +	 * As we can't skip init in these two cases.
>> +	 */
>> +	if (!qmp->skip_init && !cfg->tbls.serdes_num) {
>> +		dev_err(qmp->dev, "no init sequences are available\n");
> "Init sequence not available\n"
>
>> +		return -EINVAL;
> -ENODATA

Will fix in the next version.

>
> - Mani
>
-- 
With best wishes
Wenbin