linux-kernel - Re: [PATCH v4 02/10] arm64: dts: qcom: qcs6490-rb3gen2: Add TC956x PCIe switch node

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Message-ID: <303194d4-d342-ea4c-0bb6-5f5d0297ba23@quicinc.com>
Date: Wed, 19 Mar 2025 15:46:00 +0530
From: Krishna Chaitanya Chundru <quic_krichai@...cinc.com>
To: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
CC: Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>,
        "Bjorn
 Helgaas" <bhelgaas@...gle.com>,
        Lorenzo Pieralisi <lpieralisi@...nel.org>,
        Krzysztof Wilczyński <kw@...ux.com>,
        Manivannan Sadhasivam
	<manivannan.sadhasivam@...aro.org>,
        Rob Herring <robh@...nel.org>,
        "Krzysztof
 Kozlowski" <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        "Bjorn
 Andersson" <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>,
        <cros-qcom-dts-watchers@...omium.org>,
        Jingoo Han <jingoohan1@...il.com>, Bartosz Golaszewski <brgl@...ev.pl>,
        <quic_vbadigan@...cnic.com>, <amitk@...nel.org>,
        <dmitry.baryshkov@...aro.org>, <linux-pci@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-arm-msm@...r.kernel.org>, <jorge.ramirez@....qualcomm.com>
Subject: Re: [PATCH v4 02/10] arm64: dts: qcom: qcs6490-rb3gen2: Add TC956x
 PCIe switch node



On 3/19/2025 3:43 PM, Dmitry Baryshkov wrote:
> On Wed, Mar 19, 2025 at 09:14:22AM +0530, Krishna Chaitanya Chundru wrote:
>>
>>
>> On 3/18/2025 10:30 PM, Dmitry Baryshkov wrote:
>>> On Tue, 18 Mar 2025 at 18:11, Krishna Chaitanya Chundru
>>> <krishna.chundru@....qualcomm.com> wrote:
>>>>
>>>>
>>>>
>>>> On 3/17/2025 4:57 PM, Dmitry Baryshkov wrote:
>>>>> On Tue, Feb 25, 2025 at 03:03:59PM +0530, Krishna Chaitanya Chundru wrote:
>>>>>> Add a node for the TC956x PCIe switch, which has three downstream ports.
>>>>>> Two embedded Ethernet devices are present on one of the downstream ports.
>>>>>>
>>>>>> Power to the TC956x is supplied through two LDO regulators, controlled by
>>>>>> two GPIOs, which are added as fixed regulators. Configure the TC956x
>>>>>> through I2C.
>>>>>>
>>>>>> Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>
>>>>>> Reviewed-by: Bjorn Andersson <andersson@...nel.org>
>>>>>> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
>>>>>> ---
>>>>>>     arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 116 +++++++++++++++++++++++++++
>>>>>>     arch/arm64/boot/dts/qcom/sc7280.dtsi         |   2 +-
>>>>>>     2 files changed, 117 insertions(+), 1 deletion(-)
>>>>>>
>>>>>> @@ -735,6 +760,75 @@ &pcie1_phy {
>>>>>>        status = "okay";
>>>>>>     };
>>>>>>
>>>>>> +&pcie1_port {
>>>>>> +    pcie@0,0 {
>>>>>> +            compatible = "pci1179,0623", "pciclass,0604";
>>>>>> +            reg = <0x10000 0x0 0x0 0x0 0x0>;
>>>>>> +            #address-cells = <3>;
>>>>>> +            #size-cells = <2>;
>>>>>> +
>>>>>> +            device_type = "pci";
>>>>>> +            ranges;
>>>>>> +            bus-range = <0x2 0xff>;
>>>>>> +
>>>>>> +            vddc-supply = <&vdd_ntn_0p9>;
>>>>>> +            vdd18-supply = <&vdd_ntn_1p8>;
>>>>>> +            vdd09-supply = <&vdd_ntn_0p9>;
>>>>>> +            vddio1-supply = <&vdd_ntn_1p8>;
>>>>>> +            vddio2-supply = <&vdd_ntn_1p8>;
>>>>>> +            vddio18-supply = <&vdd_ntn_1p8>;
>>>>>> +
>>>>>> +            i2c-parent = <&i2c0 0x77>;
>>>>>> +
>>>>>> +            reset-gpios = <&pm8350c_gpios 1 GPIO_ACTIVE_LOW>;
>>>>>> +
>>>>>
>>>>> I think I've responded here, but I'm not sure where the message went:
>>>>> please add pinctrl entry for this pin.
>>>>>
>>>> Do we need to also add pinctrl property for this node and refer the
>>>> pinctrl entry for this pin?
>>>
>>> I think that is what I've asked for, was that not?
>> Currently there is no pincntrl property defined for this.
> 
> Does it need to be defined separately / specially?
> 
yes we need to define this property now.

- Krishna Chaitanya.