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Message-ID: <Z9qviF1VeSYNvcPJ@smile.fi.intel.com>
Date: Wed, 19 Mar 2025 13:50:32 +0200
From: Andy Shevchenko <andriy.shevchenko@...el.com>
To: Mathieu Dubois-Briand <mathieu.dubois-briand@...tlin.com>
Cc: Lee Jones <lee@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Kamel Bouhara <kamel.bouhara@...tlin.com>,
Linus Walleij <linus.walleij@...aro.org>,
Bartosz Golaszewski <brgl@...ev.pl>,
Dmitry Torokhov <dmitry.torokhov@...il.com>,
Uwe Kleine-König <ukleinek@...nel.org>,
Michael Walle <mwalle@...nel.org>, Mark Brown <broonie@...nel.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
"Rafael J. Wysocki" <rafael@...nel.org>,
Danilo Krummrich <dakr@...nel.org>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-gpio@...r.kernel.org,
linux-input@...r.kernel.org, linux-pwm@...r.kernel.org,
Grégory Clement <gregory.clement@...tlin.com>,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>
Subject: Re: [PATCH v5 08/11] gpio: max7360: Add MAX7360 gpio support
On Tue, Mar 18, 2025 at 05:26:24PM +0100, Mathieu Dubois-Briand wrote:
> Add driver for Maxim Integrated MAX7360 GPIO/GPO controller.
>
> Two sets of GPIOs are provided by the device:
> - Up to 8 GPIOs, shared with the PWM and rotary encoder functionalities.
> These GPIOs also provide interrupts on input changes.
> - Up to 6 GPOs, on unused keypad columns pins.
...
+ bitfield.h
> +#include <linux/bitmap.h>
+ err.h
> +#include <linux/gpio/driver.h>
> +#include <linux/gpio/regmap.h>
> +#include <linux/init.h>
> +#include <linux/interrupt.h>
> +#include <linux/mfd/max7360.h>
+ mod_devicetable.h
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/property.h>
> +#include <linux/regmap.h>
> +#include <linux/slab.h>
> +static int max7360_get_available_gpos(struct device *dev, unsigned int *available_gpios)
> +{
> + u32 columns;
> + int ret;
> +
> + ret = device_property_read_u32(dev->parent, "keypad,num-columns", &columns);
> + if (ret < 0) {
' < 0' is redundant,
> + dev_err(dev, "Failed to read columns count\n");
> + return ret;
> + }
> +
> + *available_gpios = min(MAX7360_MAX_GPO, MAX7360_MAX_KEY_COLS - columns);
> +
> + return 0;
> +}
...
> +static int max7360_set_gpos_count(struct device *dev, struct regmap *regmap)
> +{
> + /*
> + * MAX7360 COL0 to COL7 pins can be used either as keypad columns,
> + * general purpose output or a mix of both.
> + * By default, all pins are used as keypad, here we update this
> + * configuration to allow to use some of them as GPIOs.
> + */
> + unsigned int available_gpios;
> + unsigned int val;
> + int ret;
> +
> + ret = max7360_get_available_gpos(dev, &available_gpios);
> + if (ret)
> + return ret;
> +
> + /*
> + * Configure which GPIOs will be used for keypad.
> + * MAX7360_REG_DEBOUNCE contains configuration both for keypad debounce
> + * timings and gpos/keypad columns repartition. Only the later is
> + * modified here.
> + */
> + val = FIELD_PREP(MAX7360_PORTS, available_gpios);
> + ret = regmap_write_bits(regmap, MAX7360_REG_DEBOUNCE, MAX7360_PORTS, val);
> + if (ret) {
> + dev_err(dev, "Failed to write max7360 columns/gpos configuration");
> + return ret;
> + }
> +
> + return 0;
Just
return ret;
?
> +}
...
> +static int max7360_gpio_reg_mask_xlate(struct gpio_regmap *gpio,
> + unsigned int base, unsigned int offset,
> + unsigned int *reg, unsigned int *mask)
> +{
> + if (base == MAX7360_REG_PWMBASE) {
> + /*
> + * GPIO output is using PWM duty cycle registers: one register
> + * per line, with value being either 0 or 255.
> + */
> + *reg = base + offset;
> + *mask = 0xFF;
GENMASK() ?
> + } else {
> + *reg = base;
> + *mask = BIT(offset);
> + }
> +
> + return 0;
> +}
...
> +static int max7360_handle_mask_sync(const int index,
> + const unsigned int mask_buf_def,
> + const unsigned int mask_buf,
> + void *const irq_drv_data)
> +{
> + struct regmap *regmap = irq_drv_data;
> + unsigned int val;
> +
> + for (unsigned int i = 0; i < MAX7360_MAX_GPIO; ++i) {
> + val = (mask_buf & BIT(i)) ? MAX7360_PORT_CFG_INTERRUPT_MASK : 0;
> + regmap_write_bits(regmap, MAX7360_REG_PWMCFG(i),
> + MAX7360_PORT_CFG_INTERRUPT_MASK, val);
Wondering if regmap_assign_bits() can be used here.
But in any case, no error checks? It seems you do elsewhere, but this driver...
> + }
> +
> + return 0;
> +}
...
> +static int max7360_gpio_probe(struct platform_device *pdev)
> +{
> + struct regmap_irq_chip *irq_chip;
> + struct gpio_regmap_config gpio_config = { };
> + struct device *dev = &pdev->dev;
> + unsigned long gpio_function;
> + struct regmap *regmap;
> + unsigned int outconf;
> + int ret;
> +
> + regmap = dev_get_regmap(dev->parent, NULL);
> + if (!regmap)
> + return dev_err_probe(dev, -ENODEV, "could not get parent regmap\n");
> +
> + gpio_function = (uintptr_t)device_get_match_data(dev);
> +
Redundant blank line.
> + if (gpio_function == MAX7360_GPIO_PORT &&
> + (device_property_read_bool(dev, "interrupt-controller"))) {
Unneeded parentheses.
> + /*
> + * Port GPIOs with interrupt-controller property: add IRQ
> + * controller.
> + */
> + gpio_config.regmap_irq_flags = IRQF_TRIGGER_LOW | IRQF_ONESHOT | IRQF_SHARED;
But why is this being overridden? The DT or another firmware description has to
provide the correct settings, no?
> + gpio_config.regmap_irq_irqno = fwnode_irq_get_byname(dev_fwnode(dev->parent),
> + "inti");
Better split is
gpio_config.regmap_irq_irqno =
fwnode_irq_get_byname(dev_fwnode(dev->parent), "inti");
You also can use the same trick elsewhere in the similar cases.
> + if (gpio_config.regmap_irq_irqno < 0)
> + return dev_err_probe(dev, gpio_config.regmap_irq_irqno,
> + "Failed to get IRQ\n");
> +
> + irq_chip = devm_kzalloc(dev, sizeof(*irq_chip), GFP_KERNEL);
> + gpio_config.regmap_irq_chip = irq_chip;
> + if (!irq_chip)
> + return -ENOMEM;
> +
> + irq_chip->name = dev_name(dev);
> + irq_chip->status_base = MAX7360_REG_GPIOIN;
> + irq_chip->num_regs = 1;
> + irq_chip->num_irqs = MAX7360_MAX_GPIO;
> + irq_chip->irqs = max7360_regmap_irqs;
> + irq_chip->handle_mask_sync = max7360_handle_mask_sync;
> + irq_chip->status_is_level = true;
I would group this with status_base above. Easier to read and I think they are
kinda related.
> + irq_chip->irq_drv_data = regmap;
> +
> + for (unsigned int i = 0; i < MAX7360_MAX_GPIO; i++) {
> + regmap_write_bits(regmap, MAX7360_REG_PWMCFG(i),
> + MAX7360_PORT_CFG_INTERRUPT_EDGES,
> + MAX7360_PORT_CFG_INTERRUPT_EDGES);
No error checks?
> + }
> + }
> +
Probably a comment why it's not 'else if' here?
> + if (gpio_function == MAX7360_GPIO_PORT) {
> + /*
> + * Port GPIOs: set output mode configuration (constant-current or not).
> + * This property is optional.
> + */
> + outconf = 0;
> + ret = device_property_read_u32(dev, "maxim,constant-current-disable", &outconf);
> + if (ret && (ret != -EINVAL))
> + return dev_err_probe(dev, ret, "Failed to read %s device property\n",
> + "maxim,constant-current-disable");
This part is fragile, error codes are not _so_ stable inside the kernel,
and this may add an unneeded churn in case of pedantic cleanup.
Personally I would drop any messages and avoid failing the probe as to me it
does not sound like a critical issue.
> + regmap_write(regmap, MAX7360_REG_GPIOOUTM, outconf);
> + }
> +
> + /* Add gpio device. */
> + gpio_config.parent = dev;
> + gpio_config.regmap = regmap;
> + if (gpio_function == MAX7360_GPIO_PORT) {
> + gpio_config.ngpio = MAX7360_MAX_GPIO;
> + gpio_config.reg_dat_base = GPIO_REGMAP_ADDR(MAX7360_REG_GPIOIN);
> + gpio_config.reg_set_base = GPIO_REGMAP_ADDR(MAX7360_REG_PWMBASE);
> + gpio_config.reg_dir_out_base = GPIO_REGMAP_ADDR(MAX7360_REG_GPIOCTRL);
> + gpio_config.ngpio_per_reg = MAX7360_MAX_GPIO;
> + gpio_config.reg_mask_xlate = max7360_gpio_reg_mask_xlate;
> + } else {
> + ret = max7360_set_gpos_count(dev, regmap);
> + if (ret)
> + return dev_err_probe(dev, ret, "Failed to set GPOS pin count\n");
> +
> + gpio_config.reg_set_base = GPIO_REGMAP_ADDR(MAX7360_REG_PORTS);
> + gpio_config.ngpio = MAX7360_MAX_KEY_COLS;
> + gpio_config.init_valid_mask = max7360_gpo_init_valid_mask;
> + }
> +
> + return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(dev, &gpio_config));
> +}
--
With Best Regards,
Andy Shevchenko
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